Programmable 1-PLL VCXO Clock Synthesizer with 1.8-V LVCMOS Outputs

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Type Title Date
* Datasheet CDCE(L)913: Flexible Low Power LVCMOS Clock Generator With SSC Support for EMI Reduction datasheet (Rev. G) Oct. 27, 2016
Selection guides Clock & Timing Solutions (Rev. C) Jan. 19, 2017
Technical articles How to select an optimal clocking solution for your FPGA-based design Dec. 09, 2015
Software ClockPro Software (Rev. E) Feb. 11, 2015
Technical articles Clocking sampled systems to minimize jitter Jul. 31, 2014
Technical articles Timing is Everything: How to optimize clock distribution in PCIe applications Mar. 28, 2014
Application notes VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) Apr. 23, 2012
Software Drivers for the CDCEL9xx programmer EVM Apr. 27, 2011
User guides CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) Nov. 22, 2010
User guides CDCE(L)9xx Performance Evaluation Module (Rev. A) Jul. 07, 2010
Application notes Troubleshooting I2C Bus Protocol Oct. 19, 2009
Application notes Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 Sep. 23, 2009
User guides CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual Dec. 09, 2008
Application notes Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency Mar. 31, 2008
Application notes Practical consideration on choosing a crystal for CDCE(L)9xx family Mar. 24, 2008
Application notes Clocking Recommendations for DM6446 Digital Video EVM with Sngle PLL (Rev. A) Aug. 08, 2007