CDCLVC1102 (ACTIVE) Low Jitter, 1:2 LVCMOS Fan-out Clock Buffer

 

Models (1)

Title Category Type Date
CDCLVC1102/03/04/06/08/10/12 IBIS Model (Rev. B) IBIS Model ZIP 27 Oct 2010

Design kits & evaluation modules (2)

Name Part# Type
CDCLVC1104 Evaluation Module CDCLVC1104EVM Evaluation Modules & Boards
Full HD DLP4710 Chipset Evaluation Module DLPDLCR4710EVM-G2 Evaluation Modules & Boards

Reference designs

EMI/EMC Compliant 10/100 Mbps Ethernet Brick with Fiber or Twisted Pair Interface Reference Design

This ethernet brick reference design provides a simplified solution that eliminates the need to have multiple boards for copper or fiber interface. It uses a small form factor, low power 10/100 Mbps ethernet transceiver to reduce board size for a cost optimized and scalable solution with reduced (...)

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Development tools (1)

Name Part# Type
SPICE-based analog simulation program TINA-TI Circuit Design & Simulation

Design with CDCLVC1102

Frequency Number of Outputs
 MHz
Output Format