CDCLVC1102
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
Low Jitter, 1:2 LVCMOS Fan-out Clock Buffer

 

Models (1)

Title Category Type Date
CDCLVC1102/03/04/06/08/10/12 IBIS Model (Rev. B) IBIS Model ZIP 27 Oct 2010

Design kits & evaluation modules (2)

Name Part# Type
CDCLVC1104 Evaluation Module CDCLVC1104EVM Evaluation Modules & Boards
Full HD DLP4710 Chipset Evaluation Module DLPDLCR4710EVM-G2 Evaluation Modules & Boards

Reference designs

EMI/EMC Compliant 10/100 Mbps Ethernet Brick with Fiber or Twisted Pair Interface Reference Design

This ethernet brick reference design provides a simplified solution that eliminates the need to have multiple boards for copper or fiber interface. It uses a small form factor, low power 10/100 Mbps ethernet transceiver to reduce board size for a cost optimized and scalable solution with reduced (...)

View the Important Notice for reference designs covering authorized use, intellectual property matters and disclaimers.

CAD/CAE symbols

Part# Package | Pins CAD File (.bxl) STEP Model (.stp)
CDCLVC1102 Download Download

Texas Instruments and Accelerated Designs, Inc. have collaborated together to provide TI customers with schematic symbols and PCB layout footprints for TI products.

Please follow the instructions below to view the CAD symbols:

Step 1: Download and install the Ultra Librarian software

Step 2: Download the Symbol and Footprint from the CAD.bxl file table.

Step 3: Open the .bxl file with the Ultra Librarian software.

You can always access the complete CAD/CAE Symbols database at //webench.ti.com/cad/

Both PCB footprints and schematic symbols are available for download in a vendor neutral format, which can then be exported to the leading EDA CAD/CAE design tools using the Ultra Librarian Reader. The reader is available as a free download.

The UL Reader is a subset of the Ultra Librarian toolset that can generate, import, and export components and their attributes in virtually any EDA CAD/CAE format.