CDCLVC1106
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
Low Jitter, 1:6 LVCMOS Fan-out Clock Buffer

 

Models (1)

Title Category Type Date
CDCLVC1102/03/04/06/08/10/12 IBIS Model (Rev. B) IBIS Model ZIP 27 Oct 2010

Design kits & evaluation modules (2)

Name Part# Type
CDCLVC1112 Evaluation Module CDCLVC1112EVM Evaluation Modules & Boards
Smart Amplifier Speaker Characterization Board Evaluation Module PP-SALB2-EVM Evaluation Modules & Boards

Reference designs

Flexible Interface (PRU-ICSS) Reference Design for Simultaneous, Coherent DAQ Using Multiple ADCs

This reference design showcases an interface implementation for connecting multiple high voltage bipolar input, 8-channel, mux-input SAR ADCs (6) with the Sitara Arm processors for expanding the number of input channels using Programmable Real-time Unit (PRU-ICSS). ADCs are configured for (...)

View the Important Notice for reference designs covering authorized use, intellectual property matters and disclaimers.

Design with CDCLVC1106

Frequency Number of Outputs
 MHz
Output Format