CDCLVC1106 (ACTIVE) Low Jitter, 1:6 LVCMOS Fan-out Clock Buffer


Models (1)

Title Category Type Size (KB) Date Views
CDCLVC1102/03/04/06/08/10/12 IBIS Model (Rev. B) IBIS Model ZIP 263 KB 27 Oct 2010 0 views

Design kits & evaluation modules (2)

Name Part# Type
CDCLVC1112 Evaluation Module CDCLVC1112EVM Evaluation Modules & Boards
Smart Amplifier Speaker Characterization Board Evaluation Module PP-SALB2-EVM Evaluation Modules & Boards

Reference designs

TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor and connectivity. Created by TI experts to help you jump start your system design, all TI Designs include schematic or block diagrams, BOMs and design files to speed your time to market. Search and download designs at

TI Designs

Flexible Interface (PRU-ICSS) Reference Design for Simultaneous, Coherent DAQ Using Multiple ADCs

This reference design showcases an interface implementation for connecting multiple high voltage bipolar input, 8-channel, mux-input SAR ADCs (6) with the Sitara Arm processors for expanding the number of input channels using Programmable Real-time Unit (PRU-ICSS). ADCs are configured for (...)

View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.

Development tools (1)

Name Part# Type
SPICE-based analog simulation program TINA-TI Circuit Design & Simulation

Design with CDCLVC1106

Frequency Number of Outputs
Output Format