CDCUN1208LP Ultra Low Power, 2:8 Fan-out Buffer with Universal Inputs and Outputs | TI.com

CDCUN1208LP
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Ultra Low Power, 2:8 Fan-out Buffer with Universal Inputs and Outputs

 

Recommended alternative parts

  • LMK00308  - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   Low additive jitter, 1:8 Universal buffer

Description

The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range, two universal differential/single-ended inputs, and universal outputs (HCSL, LVDS, or LVCMOS) with edge-rate control. The clock buffer supports PCIe Gen1, Gen2 and Gen3. One of the device inputs includes a divider that provides divide values of /1, /2, /4, or /8. The CDCUN1208LP is offered in a 32-pin QFN package, reducing the solution footprint. The device is flexible and easy to use. The state of certain pins determines device configuration at power up. Alternately, the CDCUN1208LP provides a SPI/I2C port with which a host processor controls device settings. The CDCUN1208LP delivers excellent additive jitter performance, and low power consumption. The output section includes four dedicated supply pins enabling the operation of output ports from different power supply domains. This provides the ability to clock devices switching at different LVCMOS levels without the need for external logic level translation circuitry.

Features

  • Supports PCIe Gen1, Gen2, Gen3
  • Configuration Options (Through Pins or SPI/I2C):
    • Input Type (HCSL, LVDS, LVCMOS)
    • Output Type (HCSL, LVDS, LVCMOS)
    • Signal Edge Rate (Slow, Medium, Fast)
    • Clock Input Divide Value (/1, /2, /4, /8) – IN2 Only
  • Low-Power Consumption and Power Management Features, Including 1.8-V Operation and Output Enable Control
  • Integrated Voltage Regulators to Improve PSNR
  • Excellent Additive Jitter Performance
    • 200 fs RMS (10 kHz to 20 MHz), LVDS at
      100 MHz
    • 160 fs RMS (10 kHz to 20 MHz), HCSL at
      100 MHz
  • Maximum Operating Frequency:
    • Differential Mode: up to 400 MHz
    • LVCMOS Mode: up to 250 MHz
  • ESD Protection Exceeds 2-kV HBM, 500-V CDM
  • Industrial Temperature Range (–40°C to 85°C)
  • Wide Supply Range (1.8 V, 2.5 V, or 3.3 V)

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Design with CDCUN1208LP

Input Frequency Output Frequency
 MHz  MHz
  Number of Outputs
 
  Output Format
 

Parametrics

Compare all products in Clock buffers Email Download to Excel
Part number Order Function Additive RMS jitter (Typ) (fs) Output frequency (Max) (MHz) Number of outputs VCC out (V) VCC core (V) Output skew (ps) Features Operating temperature range (C) Rating Output type Package Group Package size: mm2:W x L (PKG) Input type
CDCUN1208LP Order now Differential
Fanout    
200     400     8     1.8
2.5
3.3    
1.8
2.5
3.3    
50     3.3-V VCC/VDD
I2C interface
Pin programmable    
-40 to 85     Catalog     HCSL     VQFN | 32     32VQFN: 25 mm2: 5 x 5 (VQFN | 32)     HCSL    
CDCDB2000 Order now Differential     80     250     20     3.3     3.3     50     1:20 fanout
PCIe Gen 1-5 compliance
DB2000QL compliant
SMBus control
Side-Band Interface
OE# control    
-40 to 85     Catalog     LP-HCSL     TLGA | 80     80TLGA: 36 mm2: 6 x 6 (TLGA | 80)     LP-HCSL    
CDCV304 Order now Single-ended     56     200     4     2.5
3.3    
2.5
3.3    
150     1:4 fanout     -40 to 85     Catalog     LVTTL     TSSOP | 8     8TSSOP: 19 mm2: 6.4 x 3 (TSSOP | 8)     LVTTL    
LMK00334 Order now Differential
Fanout    
30     400     4     2.5
3.3    
3.3     50     PCIe Gen 4 Compliant     -40 to 85     Catalog     HCSL
LVCMOS    
WQFN | 32     32WQFN: 25 mm2: 5 x 5 (WQFN | 32)     CML
HCSL
HSTL
LVCMOS
LVDS
LVPECL
SSTL
XTAL    
LMK00338 Order now Differential
Fanout    
30     400     8     2.5
3.3    
3.3     50     PCIe 3.0 Compliant     -40 to 85     Catalog     HCSL
LVCMOS    
WQFN | 40     40WQFN: 36 mm2: 6 x 6 (WQFN | 40)     CML
HCSL
HSTL
LVCMOS
LVDS
LVPECL
LVTTL
SSTL
XTAL