Dual-Channel, 14-Bit, 275-MSPS Digital-to-Analog Converter (DAC) - DAC5672

DAC5672 (ACTIVE)

Dual-Channel, 14-Bit, 275-MSPS Digital-to-Analog Converter (DAC)

 

Description

The DAC5672 device is a monolithic, dual-channel, 14-bit, high-speed DAC with on-chip voltage reference.

Operating with update rates of up to 275 MSPS, the DAC5672 offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make the device well-suited in I/Q baseband or direct IF communication applications.

Each DAC has a high-impedance, differential-current output suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5672 has two, 14-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5672 supports multiplexed data for each DAC on one port when operating in interleaved mode.

The DAC5672 is specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5672 is available in a 48-pin TQFP package. Pin compatibility between family members provides 12-bit (DAC5662) and 14-bit (DAC5672) resolutions. Furthermore, the DAC5672 is pin compatible to the DAC2904 and AD9767 dual DACs. The device is characterized for operation over the industrial temperature range from –40°C to 85°C.

Features

  • 14-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 275 MSPS Update Rate
  • Single-Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 84 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3): 79 dBc at 15.1 MHz and 16.1 MHz
  • WCDMA Adjacent Channel Leakage Ratio (ACLR): 78 dB at Baseband
  • WCDMA ACLR: 73 dB at 30.72 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2-V Reference
  • Low Power: 330 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin-Quad Flat Pack (TQFP)

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Parametrics Compare all products in High Speed DACs (>10MSPS)

 
Resolution (Bits)
Sample / Update Rate (MSPS)
DAC Channels
Interface
SFDR (dB)
Supply Voltage(s) (V)
Power Consumption (Typ) (mW)
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
Rating
Interpolation
Architecture
Output Range Max. (mA)
Output Range Min. (mA)
Output Type
Reference: Type
DAC5672 DAC5652 DAC5652A DAC5662 DAC5662A DAC5672A
14    10    10    12    12    14   
275    275    275    275    275    275   
2    2    2    2    2    2   
Parallel CMOS    Parallel CMOS    Parallel CMOS    Parallel CMOS    Parallel CMOS    Parallel CMOS   
84    80    80    81    85    84   
3.3    3.3    3.3    3.3    3.3    3.3   
330    290    290    330    330    330   
-40 to 85    -40 to 85    -40 to 85    -40 to 85    -40 to 85    -40 to 85   
TQFP    TQFP    TQFP    TQFP    TQFP    TQFP   
48TQFP: 81 mm2: 9 x 9(TQFP)    48TQFP: 81 mm2: 9 x 9(TQFP)    48TQFP: 81 mm2: 9 x 9(TQFP)    48TQFP: 81 mm2: 9 x 9(TQFP)    48TQFP: 81 mm2: 9 x 9(TQFP)    48TQFP: 81 mm2: 9 x 9(TQFP)   
Catalog    Catalog    Catalog    Catalog    Catalog    Catalog   
1x    1x    1x    1x    1x    1x   
Current Source    Current Source    Current Source    Current Source    Current Source    Current Source   
20    20    20    20    5.5    20   
2    2    2    2    0    2   
Differential    Differential    Differential    Differential    Differential    Differential   
Int    Int
Ext   
Int
Ext   
Ext    Ext    Int   

Other qualified versions of DAC5672

Version Part Number Definition
Enhanced Product DAC5672-EP Supports Defense, Aerospace and Medical Applications