DAC5687 Dual-Channel, 16-Bit, 500-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC) | TI.com

DAC5687 (ACTIVE) Dual-Channel, 16-Bit, 500-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC)

 

Description

The DAC5687 is a dual-channel 16-bit high-speed digital-to-analog converter (DAC) with integrated 2×, 4×, and 8× interpolation filters, a complex numerically controlled oscillator (NCO), onboard clock multiplier, IQ compensation, and on-chip voltage reference. The DAC5687 is pin-compatible to the DAC5686, requiring only changes in register settings for most applications, and offers additional features and superior linearity, noise, crosstalk, and PLL phase noise performance.

The DAC5687 has six signal processing blocks: two interpolate-by-two digital filters, a fine frequency mixer with 32-bit NCO, a quadrature modulation compensation block, another interpolate-by-two digital filter, and a coarse frequency mixer with fS/2 or fS/4. The different modes of operation enable or bypass the signal processing blocks.

The coarse and fine mixers can be combined to span a wider range of frequencies with fine resolution. The DAC5687 allows both complex or real output. Combining the frequency upconversion and complex output produces a Hilbert transform pair that is output from the two DACs. An external RF quadrature modulator then performs the final single-sideband upconversion.

The IQ compensation feature allows optimization of phase, gain, and offset to maximize sideband rejection and minimize LO feedthrough for an analog quadrature modulator.

The DAC5687 includes several input options: single-port interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease the input timing ambiguity when the DAC5687 is clocked at the DAC output sample rate.

Features

  • 500 MSPS
  • Selectable 2×-8× Interpolation
  • On-Chip PLL/VCO Clock Multiplier
  • Full IQ Compensation Including Offset, Gain, and Phase
  • Flexible Input Options:
    • FIFO With Latch on External or Internal Clock
    • Even/Odd Multiplexed Input
    • Single Port Demultiplexed Input
  • Complex Mixer With 32-Bit NCO
  • Fixed Frequency Mixer With fS/4 and fS/2
  • 1.8-V or 3.3-V I/O Voltage
  • On-Chip 1.2-V Reference
  • Differential Scalable Output: 2 mA to 20 mA
  • Pin Compatible to DAC5686
  • High Performance
    • 81-dBc ACLR WCDMA TM1 at 30.72 MHz
    • 72-dBc ACLR WCDMA TM1 at 153.6 MHz
  • Package: 100-Pin HTQFP
  • APPLICATIONS
    • Cellular Base Transceiver Station Transmit Channel
      • CDMA: W-CDMA, CDMA2000, TD-SCDMA
      • TDMA: GSM, IS-136, EDGE/UWC-136
      • OFDM: 802.16
    • Cable Modem Termination System

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Parametrics

Compare all products in High-speed DACs (>10MSPS) Email Download to Excel
Part number Order Sample/update rate (MSPS) Features Internal PLL Resolution (Bits) DAC channels Interface SFDR (dB) Supply voltage(s) (V) Power consumption (Typ) (mW) Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Rating Interpolation Architecture Output type Reference: type
DAC5687 Order now 500     High Performance     Yes     16     2     Parallel CMOS     80     1.8, 3.3     1410     -40 to 85     HTQFP | 100     100HTQFP: 256 mm2: 16 x 16 (HTQFP | 100)     Catalog     1x
2x
4x
8x    
Current Sink     Differential     Int    
DAC5686 Order now 500     High Performance     Yes     16     2     Parallel CMOS     72     1.8, 3.3     445     -40 to 85     HTQFP | 100     100HTQFP: 256 mm2: 16 x 16 (HTQFP | 100)     Catalog     16x
1x
2x
4x
8x    
Current Sink     Differential     Int