DLPC150 Digital Controller for the DLP2010NIR DMD | TI.com

DLPC150 (ACTIVE)

Digital Controller for the DLP2010NIR DMD

 

Special note

Important note

DLPC150 firmware v2.2.0 (or higher) is required for reliable operation with DLP2010NIRAFQJ.

Important note

DLPC150 firmware v2.2.0 (or higher) is required for reliable operation with DLP2010NIRAFQJ.

Description

The DLPC150 controller provides a convenient, reliable, and multi-functional interface between user electronics and the visible DLP2010 or the near-infrared (NIR) DLP2010NIR digital micromirror device (DMD) to steer light and create patterns with high-speed, precision, and efficiency. The DLPC150 controller enables high-speed pattern rates, along with LED control and data formatting for multiple input formats. The DLPC150 controller also provides input and output trigger signals for synchronizing displayed patterns with a camera, sensor, or other peripherals. The DLPC150 controller is part of the 0.2 WVGA chipset that includes the DLP2010 or DLP2010NIR DMD and DLPA2000 or DLPA2005 power management integrated chip (PMIC). The DLPC150 controller enables integration of the DLP® 0.2 WVGA visible or NIR chipset into small form-factor, low-power, and low-cost applications for programmable spectrum and wavelength control, such as 3D scanning or metrology systems, spectrometers, interactive displays, chemical analyzers, medical instruments, skin analysis, material identification, and chemical sensing.

Features

  • Display Controller Required for Reliable Operation of the DLP2010 and DLP2010NIR DMDs
  • High Speed Pattern Sequence Mode
    • 1-Bit Binary Pattern Rates to 2880 Hz
    • 1-to-1 Input Mapping to Micromirrors
  • Easy Synchronization With Cameras and Sensors
    • One Input Trigger
    • Two Output Triggers
  • I2C Configuration Interface
  • Input Pixel Interface Support:
    • 24-bit Parallel RGB888 Interface Protocol
    • 16-bit Parallel RGB565 Interface Protocol
    • Pixel Clock up to 75 MHz
  • Integrated Micromirror Drivers
  • Integrated Clock Generation
  • Auto DMD Parking at Power Down
  • 201-Pin, 13mm- × 13-mm, 0.8-mm Pitch, VFBGA Package

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Parametrics

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Part number Order Illumination wavelength range (nm) Micromirror array size Chipset family Pattern rate, binary (Max) (Hz) Component type Number of triggers (Input / Output) GPIO Display resolution (Max) Micromirror array orientation Micromirror driver support Package Group Power consumption, typical (mW) Thermal dissipation (°C/W)
DLPC150 Order now
   
   
DLP2010NIR     2880     Digital Controller     1 / 2     18     WVGA    
   
Integrated     NFBGA | 201     310     10.1