DLPC410 Digital Controller for Discovery 4100 chipset | TI.com

DLPC410 (ACTIVE)

Digital Controller for Discovery 4100 chipset

Digital Controller for Discovery 4100 chipset - DLPC410
Datasheet
 

Description

The DLPC410 is a digital controller that supports five DMD options: DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV. It is the convenient, high-speed data and control interface between the application electronics and the DMD. The DLPC410 provides DMD Mirror Clocking Pulses (Resets) and timing information to the DLPA200 DMD Micromirror Driver. The device is configured with firmware stored in the DLPR410 PROM.

This family of chipsets enables pixel data rates up to 48 Gigabits per second (Gbps) with the option for single, dual, quad, and global Resets. In addition, random row addressing and LOAD4 capabilities are offered. Often the family of chips is used when designing UV and NIR systems such as direct imaging lithography, 3D printing, and laser marking systems that need fast throughput and pixel accurate control.

In DLP-based electronics solutions, image data is 100% digital from the DLPC410 input port to the projected image. The image stays in digital form and is never converted into an analog signal. The DLPC410 processes the digital input image and converts the data into a format needed by the image on the DMD. The DMD then steers the light using binary pulse-width modulation (PWM) for each pixel mirror.

Features

  • Operates the Following DLP® Chips:
    • DLP650LNIR, DLP7000, DLP7000UV, DLP9500, and DLP9500UV DMDs
    • DLPA200 DMD Micromirror Driver
    • DLPR410 Configuration PROM
  • Enables High Speed DMD Pattern Rates
    • 1-Bit Binary Pattern Rates up to 32 kHz
    • 8-Bit Monochrome Pattern Rates up to 4 kHz
  • 400 MHz Input Data Clock Rates
  • 64-Bit 2xLVDS Data Bus Interfaces In/Out
  • Supports Random Row and LOAD4 DMD Addressing
  • Compatible With a Variety of User Defined Processors or FPGAs

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Parametrics Compare all products in High speed visible

 
Illumination wavelength range (nm)
Micromirror array size
Chipset family
Pattern rate, binary (Max) (Hz)
Component type
Number of triggers (Input / Output)
GPIO
Display resolution (Max)
Pattern rate, 8-bit (Max) (Hz)
Micromirror array orientation
Micromirror driver support
Package Group
Power consumption, typical (mW)
Thermal Dissipation (°C/W)
Approx. price (US$)
DLPC410 DLPC910
   
   
   
   
DLP7000
DLP9500    
DLP6500
DLP9000    
32552     14989    
Digital Controller     Digital Controller    
0 / 1     0 / 0    
0     0    
1080p     WQXGA    
1900     1800    
   
   
External     Integrated    
FCBGA | 676     FCBGA | 676    
  3.2    
3.2      
220.00 | 100u     335.23 | 100u