SLES267C August   2011  – March 2016 DRV8302

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Gate Timing and Protection Characteristics
    7. 6.7 Current Shunt Amplifier Characteristics
    8. 6.8 Buck Converter Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Function Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Three-Phase Gate Driver
      2. 7.3.2 Current Shunt Amplifiers
      3. 7.3.3 Buck Converter
      4. 7.3.4 Protection Features
        1. 7.3.4.1 Overcurrent Protection (OCP) and Reporting
          1. 7.3.4.1.1 Current Limit Mode (M_OC = LOW)
          2. 7.3.4.1.2 OC Latch Shutdown Mode
        2. 7.3.4.2 OC_ADJ
        3. 7.3.4.3 Undervoltage Protection (UVLO)
        4. 7.3.4.4 Overvoltage Protection (GVDD_OV)
        5. 7.3.4.5 Overtemperature Protection
        6. 7.3.4.6 Fault and Protection Handling
    4. 7.4 Device Functional Modes
      1. 7.4.1 EN_GATE
      2. 7.4.2 DTC
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Gate Driver Power Up Sequencing Errdata
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Gate Drive Average Current Load
        2. 8.2.2.2 Overcurrent Protection Setup
        3. 8.2.2.3 Sense Amplifier Setup
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from B Revision (February 2016) to C Revision

  • Deleted REG 0x02 from the test conditions of the Ioso1 and Iosi1 parameters in the Electrical Characteristics table Go
  • Changed the value of R1 + R2 ≥ 100 KΩ to R1 + R2 ≥ 1 KΩ in the OC_ADJ section.Go

Changes from A Revision (December 2015) to B Revision

Changes from * Revision (August 2011) to A Revision

  • Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • VPVDD absolute max voltage rating reduced from 70 V to 65 V Go
  • Clarification made on how the OCP status bits report in Overcurrent Protection (OCP) and Reporting Go
  • Update to PVDD1 undervoltage protection in Undervoltage Protection (UVLO) describing specific transient brownout issue. Go
  • Update to EN_GATE pin functional description in EN_GATE clarifying proper EN_GATE reset pulse lengths. Go
  • Added gate driver power-up sequencing errata Gate Driver Power Up Sequencing ErrdataGo
  • Added Community Resources Go