SLVSDJ3A February 2017  – April 2017 DRV8320 , DRV8320R , DRV8323 , DRV8323R

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6SPI Timing Requirements
    7. 7.7Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1Three Phase Smart Gate Drivers
        1. 8.3.1.1PWM Control Modes
          1. 8.3.1.1.16x PWM Mode (PWM_MODE = 00b or MODE Pin Tied to AGND)
          2. 8.3.1.1.23x PWM Mode (PWM_MODE = 01b or MODE Pin = 47 kΩ to AGND)
          3. 8.3.1.1.31x PWM Mode (PWM_MODE = 10b or MODE Pin = Hi-Z)
          4. 8.3.1.1.4Independent PWM Mode (PWM_MODE = 11b or MODE Pin Tied to DVDD)
        2. 8.3.1.2Device Interface Modes
          1. 8.3.1.2.1Serial Peripheral Interface (SPI)
          2. 8.3.1.2.2Hardware Interface
        3. 8.3.1.3Gate Driver Voltage Supplies
        4. 8.3.1.4Smart Gate Drive Architecture
          1. 8.3.1.4.1IDRIVE: MOSFET Slew-Rate Control
          2. 8.3.1.4.2TDRIVE: MOSFET Gate Drive Control
          3. 8.3.1.4.3Propagation Delay
          4. 8.3.1.4.4MOSFET VDS Monitors
          5. 8.3.1.4.5VDRAIN Sense Pin
      2. 8.3.2DVDD Linear Voltage Regulator
      3. 8.3.3Pin Diagrams
      4. 8.3.4Low-Side Current-Shunt Amplifiers (DRV8323 and DRV8323R Only)
        1. 8.3.4.1Bidirectional Current Sense Operation
        2. 8.3.4.2Unidirectional Current Sense Operation (SPI only)
        3. 8.3.4.3Auto Offset Calibration
        4. 8.3.4.4MOSFET VDS Sense Mode (SPI Only)
      5. 8.3.5Step-Down Buck Regulator
        1. 8.3.5.1Fixed Frequency PWM Control
        2. 8.3.5.2Bootstrap Voltage (CB)
        3. 8.3.5.3Output Voltage Setting
        4. 8.3.5.4Enable nSHDN and VIN Undervoltage Lockout
        5. 8.3.5.5Current Limit
        6. 8.3.5.6Overvoltage Transient Protection
        7. 8.3.5.7Thermal Shutdown
      6. 8.3.6Gate-Driver Protective Circuits
        1. 8.3.6.1VM Supply Undervoltage Lockout (UVLO)
        2. 8.3.6.2VCP Charge-Pump Undervoltage Lockout (CPUV)
        3. 8.3.6.3MOSFET VDS Overcurrent Protection (VDS_OCP)
          1. 8.3.6.3.1VDS Latched Shutdown (OCP_MODE = 00b)
          2. 8.3.6.3.2VDS Automatic Retry (OCP_MODE = 01b)
          3. 8.3.6.3.3VDS Report Only (OCP_MODE = 10b)
          4. 8.3.6.3.4VDS Disabled (OCP_MODE = 11b)
        4. 8.3.6.4VSENSE Overcurrent Protection (SEN_OCP)
          1. 8.3.6.4.1VSENSE Latched Shutdown (OCP_MODE = 00b)
          2. 8.3.6.4.2VSENSE Automatic Retry (OCP_MODE = 01b)
          3. 8.3.6.4.3VSENSE Report Only (OCP_MODE = 10b)
          4. 8.3.6.4.4VSENSE Disabled (OCP_MODE = 11b or DIS_SEN = 1b)
        5. 8.3.6.5Gate Driver Fault (GDF)
        6. 8.3.6.6Thermal Warning (OTW)
        7. 8.3.6.7Thermal Shutdown (OTSD)
    4. 8.4Device Functional Modes
      1. 8.4.1Gate Driver Functional Modes
        1. 8.4.1.1Sleep Mode
        2. 8.4.1.2Operating Mode
        3. 8.4.1.3Fault Reset (CLR_FLT or ENABLE Reset Pulse)
      2. 8.4.2Buck Regulator Functional Modes
        1. 8.4.2.1Continuous Conduction Mode (CCM)
        2. 8.4.2.2Eco-mode Control Scheme
    5. 8.5Programming
      1. 8.5.1SPI Communication
        1. 8.5.1.1SPI
          1. 8.5.1.1.1SPI Format
    6. 8.6Register Maps
      1. 8.6.1Status Registers
        1. 8.6.1.1Fault Status Register 1 (address = 0x00h)
        2. 8.6.1.2Fault Status Register 2 (address = 0x01h)
      2. 8.6.2Control Registers
        1. 8.6.2.1Driver Control Register (address = 0x02h)
        2. 8.6.2.2Gate Drive HS Register (address = 0x03h)
        3. 8.6.2.3Gate Drive LS Register (address = 0x03h)
        4. 8.6.2.4OCP Control Register (address = 0x05h)
        5. 8.6.2.5CSA Control Register (DRV8323x Only) (address = 0x06h)
  9. Application and Implementation
    1. 9.1Application Information
    2. 9.2Typical Application
      1. 9.2.1Primary Application
        1. 9.2.1.1Design Requirements
        2. 9.2.1.2Detailed Design Procedure
          1. 9.2.1.2.1External MOSFET Support
            1. 9.2.1.2.1.1Example
          2. 9.2.1.2.2IDRIVE Configuration
            1. 9.2.1.2.2.1Example
          3. 9.2.1.2.3VDS Overcurrent Monitor Configuration
            1. 9.2.1.2.3.1Example
          4. 9.2.1.2.4Sense-Amplifier Bidirectional Configuration (DRV8323 and DRV8323R)
            1. 9.2.1.2.4.1Example
          5. 9.2.1.2.5Buck Regulator Configuration (DRV8320R and DRV8323R)
        3. 9.2.1.3Application Curves
      2. 9.2.2Alternative Application
        1. 9.2.2.1Design Requirements
        2. 9.2.2.2Detailed Design Procedure
          1. 9.2.2.2.1Sense Amplifier Unidirectional Configuration
            1. 9.2.2.2.1.1Example
  10. 10Power Supply Recommendations
    1. 10.1Bulk Capacitance Sizing
  11. 11Layout
    1. 11.1Layout Guidelines
      1. 11.1.1Buck-Regulator Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Device Support
      1. 12.1.1Device Nomenclature
    2. 12.2Documentation Support
      1. 12.2.1Related Documentation
    3. 12.3Related Links
    4. 12.4Receiving Notification of Documentation Updates
    5. 12.5Community Resources
    6. 12.6Trademarks
    7. 12.7Electrostatic Discharge Caution
    8. 12.8Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Features

  • Triple Half-Bridge Gate Driver
    • Drives High-Side and Low-Side
      N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • Smart Gate Drive Architecture
    • Adjustable Slew Rate Control
    • 10-mA to 1-A Peak Source Current
    • 20-mA to 2-A Peak Sink Current
  • Integrated Gate Driver Power Supplies
    • High-Side Charge Pump
    • Low-Side Linear Regulator
  • 6 to 60-V Operating Voltage Range
  • Optional Integrated Buck Regulator
    • LMR16006X SIMPLE SWITCHER®
    • 4 to 60-V Operating Voltage Range
    • 0.8 to 60-V, 600-mA Output Capability
  • Optional Integrated Triple Current
    Shunt Amplifiers
    • Adjustable Gain (5, 10, 20, 40 V/V)
    • Bidirectional or Unidirectional Support
  • Selectable SPI or Hardware Interface
  • 6x, 3x, 1x, and Independent PWM Modes
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Low-Power Sleep Mode (20-µA)
  • Linear Voltage Regulator, 3.3 V, 30 mA
  • Compact QFN Packages and Footprints
  • Efficient System Design With CSD88599Q5DC
  • Integrated Protection Features
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • MOSFET Overcurrent Protection (OCP)
    • Gate Driver Fault (GDF)
    • Thermal Warning and Shutdown (OTW/OTSD)
    • Fault Condition Indicator (nFAULT)

Applications

  • BLDC Motor Modules
  • CPAPs, Fans, and Pumps
  • E-Bikes
  • Power Tools and Lawn Appliances
  • Drones, Robotics, and RC Toys
  • ATM and Currency Counting

Description

The DRV832x family of devices are integrated gate drivers for three-phase applications. The devices provides three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV832x generates the proper gate drive voltages using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The smart gate drive architecture supports up to 1-A source and 2-A sink peak gate drive current capability. The DRV832x can operate from a single power supply and supports a wide input supply range of 6 to 60-V for the gate driver and 4 to 60-V for the optional buck regulator.

The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. Gate drive and device configuration settings are highly configurable through a SPI or hardware (H/W) interface. The DRV8323 and DRV8323R devices have three, integrated low-side shunt amplifiers that allow bidirectional current sensing on all three phases of the drive stage. The DRV8320R and DRV8323R devices integrate a 600-mA buck regulator.

A low-power sleep mode is provided to achieve low quiescent current draw by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for SPI device variants.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
DRV8320WQFN (32)5.00 mm × 5.00 mm
DRV8320RVQFN (40)6.00 mm × 6.00 mm
DRV8323WQFN (40)6.00 mm × 6.00 mm
DRV8323RVQFN (48)7.00 mm × 7.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

DRV8320 DRV8320R DRV8323 DRV8323R simp_sch_slvsdj3.gif

Revision History

Changes from * Revision (February 2017) to A Revision

  • Changed the test condition for the IBIAS parameter in the Electrical Characteristics tableGo
  • Changed the GHx values in the 3x PWM Mode Truth TableGo
  • Changed the calibration description and added auto calibration feature description Go