DS89C21

ACTIVE

Differential CMOS Line Driver and Receiver Pair

Product details

Number of receivers 1 Number of transmitters 1 Duplex Full Supply voltage (nom) (V) 5 Signaling rate (max) (MBits) 10 IEC 61000-4-2 contact (±V) None Fault protection (V) -12 to 12 Common-mode range (V) -7 to 7 Number of nodes 32 Isolated No Supply current (max) (µA) 6000 Rating Catalog Operating temperature range (°C) -40 to 85
Number of receivers 1 Number of transmitters 1 Duplex Full Supply voltage (nom) (V) 5 Signaling rate (max) (MBits) 10 IEC 61000-4-2 contact (±V) None Fault protection (V) -12 to 12 Common-mode range (V) -7 to 7 Number of nodes 32 Isolated No Supply current (max) (µA) 6000 Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Meets TIA/EIA-422-A (RS-422) and CCITT V.11 Recommendation
  • LOW POWER Design—15 mW Typical
  • Guaranteed AC Parameters:
    • Maximum Driver Skew 2.0 ns
    • Maximum Receiver Skew 4.0 ns
  • Extended Temperature Range: −40°C to +85°C
  • Available in SOIC Packaging
  • Operates over 20 Mbps
  • Receiver OPEN Input Failsafe Feature

All trademarks are the property of their respective owners.

  • Meets TIA/EIA-422-A (RS-422) and CCITT V.11 Recommendation
  • LOW POWER Design—15 mW Typical
  • Guaranteed AC Parameters:
    • Maximum Driver Skew 2.0 ns
    • Maximum Receiver Skew 4.0 ns
  • Extended Temperature Range: −40°C to +85°C
  • Available in SOIC Packaging
  • Operates over 20 Mbps
  • Receiver OPEN Input Failsafe Feature

All trademarks are the property of their respective owners.

The DS89C21 is a differential CMOS line driver and receiver pair, designed to meet the requirements of TIA/EIA-422-A (RS-422) electrical characteristics interface standard. The DS89C21 provides one driver and one receiver in a minimum footprint. The device is offered in an 8-pin SOIC package.

The CMOS design minimizes the supply current to 6 mA, making the device ideal for use in battery powered or power conscious applications.

The driver features a fast transition time specified at 2.2 ns, and a maximum differential skew of 2 ns making the driver ideal for use in high speed applications operating above 10 MHz.

The receiver can detect signals as low as 200 mV, and also incorporates hysteresis for noise rejection. Skew is specified at 4 ns maximum.

The DS89C21 is compatible with TTL and CMOS levels (DI and RO).

The DS89C21 is a differential CMOS line driver and receiver pair, designed to meet the requirements of TIA/EIA-422-A (RS-422) electrical characteristics interface standard. The DS89C21 provides one driver and one receiver in a minimum footprint. The device is offered in an 8-pin SOIC package.

The CMOS design minimizes the supply current to 6 mA, making the device ideal for use in battery powered or power conscious applications.

The driver features a fast transition time specified at 2.2 ns, and a maximum differential skew of 2 ns making the driver ideal for use in high speed applications operating above 10 MHz.

The receiver can detect signals as low as 200 mV, and also incorporates hysteresis for noise rejection. Skew is specified at 4 ns maximum.

The DS89C21 is compatible with TTL and CMOS levels (DI and RO).

Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device
THVD1551 ACTIVE 5V RS-485 Transceivers With ±18kV IEC ESD Protection Pin-to-pin device that offers integrated IEC ESD protection (18-kV contact discharge), IEC EFT (4-kV noise immunity), and extended common voltage range

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet DS89C21 Differential CMOS Line Driver and Receiver Pair datasheet (Rev. C) 25 Apr 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

DS89C21 IBIS Model

SNLM073.ZIP (11 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins Download
SOIC (D) 8 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos