DS90UB913Q/4Q 10-100MHz 10/12-Bit FPD-Link III SER/DES - DS90UB914Q-Q1

DS90UB914Q-Q1 (ACTIVE)

DS90UB913Q/4Q 10-100MHz 10/12-Bit FPD-Link III SER/DES

 

Recommended alternative parts

  • DS90UB914A-Q1  -  25-100MHz 10/12-Bit FPD-Link III Deserializer with Coax Support for ADAS
  • DS90UB926Q-Q1  -  5-85MHz 24-Bit RGB FPD-Link III Deserializer for Infotainment
  • DS90UB928Q-Q1  -  5-85MHz OpenLDI FPD-Link III Deserializer for Infotainment

Description

The DS90UB91xQ-Q1 chipset offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single differential pair. The DS90UB91xQ-Q1 chipsets incorporate differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer and deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This chipset is ideally suited for driving video data that requires up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

There is a multiplexer at the deserializer to choose between two input imagers. The deserializer can have only one active input imager. The primary video transport converts 10- and 12-bit data over a single high-speed serial stream, along with a separate low latency bidirectional control channel transport that accepts control information from an I2C port and is independent of video blanking period.

Using TI’s embedded-clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical bidirectional control channel information in both directions. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing paths, which reduces PCB layers, cable width, connector size and pins. In addition, the deserializer inputs provide adaptive equalization to compensate for loss from the media over longer distances. Internal DC-balanced encoding and decoding is used to support AC-coupled interconnects. The Serializer is offered in a 32-pin WQFN package and the deserializer is offered in a 48-pin WQFN package.

Features

  • 10-MHz to 100-MHz Input Pixel Clock Support
  • Single Differential Pair Interconnect
  • Programmable Data Payload:
    • 10-bit Payload up to 100 MHz
    • 12-bit Payload up to 75 MHz
  • Continuous Low Latency Bidirectional Control
    Interface Channel With I2C Support at 400 kHz
  • 2:1 Multiplexer to Choose Between Two Input
    Imagers
  • Embedded Clock With DC-Balanced Coding to
    Support AC-Coupled Interconnects
  • Capable of Driving up to 25 Meters Shielded
    Twisted-Pair
  • Receive Equalizer Automatically Adapts for
    Changes in Cable Loss
  • Four Dedicated General-Purpose Input/Output
    Pins (GPIO) Available on Both Serializer and
    Deserializer
  • LOCK Output Reporting Pin and AT-SPEED BIST
    Diagnosis Feature to Validate Link Integrity
  • 1.8-V, 2.8-V or 3.3-V Compatible Parallel Inputs
    on Serializer
  • Single Power Supply at 1.8 V
  • ISO 10605 and IEC 61000-4-2 ESD Compliant
  • Automotive-Grade Product: AEC-Q100 Grade 2
    Qualified
  • Temperature Range −40°C to +105°C
  • Small Serializer Footprint (5 mm × 5 mm)
  • EMI/EMC Mitigation on Deserializer
    • Programmable Spread Spectrum (SSCG)
      Outputs
    • Receiver Staggered Outputs

View more

Parametrics Compare all products in FPD-Link III SerDes

 
Function
Color Depth (bpp)
Pixel Clock Min (MHz)
Pixel Clock (Max) (MHz)
Pin/Package
Input Compatibility
Operating Temperature Range (C)
Output Compatibility
Control Channel
Signal Conditioning
Diagnostics
EMI Reduction
Special Features
Total Throughput (Mbps)
DS90UB914Q-Q1 DS90UB901Q-Q1 DS90UB902Q-Q1 DS90UB903Q-Q1 DS90UB904Q-Q1 DS90UB913Q-Q1
Deserializer    Serializer    Deserializer    Serializer    Deserializer    Serializer   
12    14    14    18    18    12   
10    10    10    10    10    10   
100    43    43    43    43    100   
48WQFN    32WQFN    40WQFN    40WQFN    48WQFN    32WQFN   
FPD-Link III LVDS    LVCMOS    FPD-Link III LVDS    LVCMOS    FPD-Link III LVDS    LVCMOS   
-40 to 105    -40 to 105    -40 to 105    -40 to 105    -40 to 105    -40 to 105   
LVCMOS    FPD-Link III LVDS    LVCMOS    FPD-Link III LVDS    LVCMOS    FPD-Link III LVDS   
GPIO
I2C   
GPIO
I2C   
BIST
I2C   
GPO
I2C   
GPI
I2C   
GPIO
I2C   
Adaptive Equalizer    -    Programmable Equalizer    -    Programmable Equalizer    -   
BIST    BIST    BIST    BIST    BIST    BIST   
SSCG
Staggered Outputs   
-    SSCG
Staggered Outputs   
-    SSCG
Staggered Outputs   
-   
2:1 input multiplexer
CRC
I2C Config   
CRC
I2C Config   
CRC
I2C Config   
I2C Config    I2C Config    CRC
I2C Config   
1400    688    688    900    900    1400   

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