F28M35H52C Concerto Microcontroller

Description

The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family.

The communications subsystem is based on the industry-standard 32-bit ARM Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface.

The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000™ Piccolo™ and Delfino™ families. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms.

A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification.

Features

Master Subsystem — ARM^® Cortex^®-M3
- Up to 100 MHz
- Embedded Memory
  - Up to 512KB of Flash (ECC)
  - Up to 32KB of RAM (ECC or Parity)
  - Up to 64KB of Shared RAM
  - 2KB of IPC Message RAM
- Five Universal Asynchronous Receiver/Transmitters (UARTs)
- Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI)
- Two Inter-integrated Circuits (I2Cs)
- Universal Serial Bus On-the-Go (USB-OTG) + PHY
- 10/100 ENET 1588 MII
- Two Controller Area Network, D_CAN, Modules (Pin-Bootable)
- 32-Channel Micro Direct Memory Access (µDMA)
- Dual Security Zones (128-Bit Password per Zone)
- External Peripheral Interface (EPI)
- Micro Cyclic Redundancy Check (µCRC) Module
- Four General-Purpose Timers
- Two Watchdog Timer Modules
- Endianness: Little Endian
Clocking
- On-chip Crystal Oscillator and External Clock Input
- Dynamic Phase-Locked Loop (PLL) Ratio Changes Supported
1.2-V Digital, 1.8-V Analog, 3.3-V I/O Design
Interprocessor Communications (IPC)
- 32 Handshaking Channels
- Four Channels Generate IPC Interrupts
- Can be Used to Coordinate Transfer of Data Through IPC Message RAMs
Up to 74 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
- Glitch-free I/Os
Control Subsystem — TMS320C28x 32-Bit CPU
- Up to 150 MHz
- C28x Core Hardware Built-in Self-Test
- Embedded Memory
  - Up to 512KB of Flash (ECC)
  - Up to 36KB of RAM (ECC or Parity)
  - Up to 64KB of Shared RAM
  - 2KB of IPC Message RAM
- IEEE-754 Single-Precision Floating-Point Unit (FPU)
- Viterbi, Complex Math, CRC Unit (VCU)
- Serial Communications Interface (SCI)
- SPI
- I2C
- 6-Channel Direct Memory Access (DMA)
- Nine Enhanced Pulse Width Modulator (ePWM) Modules
  - 18 Outputs (16 High-Resolution)
- Six 32-Bit Enhanced Capture (eCAP) Modules
- Three 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
- Multichannel Buffered Serial Port (McBSP)
- EPI
- One Security Zone (128-Bit Password)
- Three 32-Bit Timers
- Endianness: Little Endian
Analog Subsystem
- Dual 12-Bit Analog-to-Digital Converters (ADCs)
- Up to 2.88 MSPS
- Up to 20 Channels
- Four Sample-and-Hold (S/H) Circuits
- Up to Six Comparators With 10-Bit Digital-to-Analog Converter (DAC)
Package
- 144-Pin RFP PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP)
Temperature Options:
- T: –40ºC to 105ºC Junction
- S: –40ºC to 125ºC Junction
- Q: –40ºC to 125ºC Free-Air
  (AEC Q100 Qualification for Automotive Applications)

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F28M35H52C (ACTIVE) Concerto Microcontroller

Description

Features