The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M36x family of devices is the second series in the Concerto family.
The communications subsystem is based on the industry-standard 32-bit ARM Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface.
The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000™ Piccolo™ and Delfino™ families. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms.
A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification.
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|Part number||Order||Total processing (MIPS)||Frequency (MHz)||Flash (KB)||ADC resolution||ADC (Ch)||RAM (KB)||Sigma-delta filter||PWM (Ch)||High-resolution PWM (ch)||UART (SCI)||I2C||SPI||CAN (#)||DMA (Ch)||QEP||USB||Operating temperature range (C)||Approx. price (US$)||Rating||Package Group|
|1024||12-bit||24||232||0||24||16||6||3||5||2||1 6-Ch DMA, 1 32-ch DMA||3||1||-40 to 105||15.75 | 1ku||Catalog||NFBGA | 289|
|F28M36H33B2||Samples not available||250||
|768||12-bit||24||232||0||24||16||6||3||5||2||1 6-Ch DMA, 1 32-ch DMA||3||1||-40 to 105||15.15 | 1ku||Catalog||NFBGA | 289|