SNOSCZ5A June   2015  – June 2015 FDC2112 , FDC2114 , FDC2212 , FDC2214

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description, continued
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics - I2C
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Clocking Architecture
      2. 9.3.2 Multi-Channel and Single-Channel Operation
        1. 9.3.2.1 Gain and Offset (FDC2112, FDC2114 only)
      3. 9.3.3 Current Drive Control Registers
      4. 9.3.4 Device Status Registers
      5. 9.3.5 Input Deglitch Filter
    4. 9.4 Device Functional Modes
      1. 9.4.1 Start-up Mode
      2. 9.4.2 Normal (Conversion) Mode
      3. 9.4.3 Sleep Mode
      4. 9.4.4 Shutdown Mode
        1. 9.4.4.1 Reset
    5. 9.5 Programming
      1. 9.5.1 I2C Interface Specifications
    6. 9.6 Register Maps
      1. 9.6.1  Register List
      2. 9.6.2  Address 0x00, DATA_CH0
      3. 9.6.3  Address 0x01, DATA_LSB_CH0 (FDC2212 / FDC2214 only)
      4. 9.6.4  Address 0x02, DATA_CH1
      5. 9.6.5  Address 0x03, DATA_LSB_CH1 (FDC2212 / FDC2214 only)
      6. 9.6.6  Address 0x04, DATA_CH2 (FDC2114, FDC2214 only)
      7. 9.6.7  Address 0x05, DATA_LSB_CH2 (FDC2214 only)
      8. 9.6.8  Address 0x06, DATA_CH3 (FDC2114, FDC2214 only)
      9. 9.6.9  Address 0x07, DATA_LSB_CH3 (FDC2214 only)
      10. 9.6.10 Address 0x08, RCOUNT_CH0
      11. 9.6.11 Address 0x09, RCOUNT_CH1
      12. 9.6.12 Address 0x0A, RCOUNT_CH2 (FDC2114, FDC2214 only)
      13. 9.6.13 Address 0x0B, RCOUNT_CH3 (FDC2114, FDC2214 only)
      14. 9.6.14 Address 0x0C, OFFSET_CH0 (FDC21112 / FDC2114 only)
      15. 9.6.15 Address 0x0D, OFFSET_CH1 (FDC21112 / FDC2114 only)
      16. 9.6.16 Address 0x0E, OFFSET_CH2 (FDC2114 only)
      17. 9.6.17 Address 0x0F, OFFSET_CH3 (FDC2114 only)
      18. 9.6.18 Address 0x10, SETTLECOUNT_CH0
      19. 9.6.19 Address 0x11, SETTLECOUNT_CH1
      20. 9.6.20 Address 0x12, SETTLECOUNT_CH2 (FDC2114, FDC2214 only)
      21. 9.6.21 Address 0x13, SETTLECOUNT_CH3 (FDC2114, FDC2214 only)
      22. 9.6.22 Address 0x14, CLOCK_DIVIDERS_CH0
      23. 9.6.23 Address 0x15, CLOCK_DIVIDERS_CH1
      24. 9.6.24 Address 0x16, CLOCK_DIVIDERS_CH2 (FDC2114, FDC2214 only)
      25. 9.6.25 Address 0x17, CLOCK_DIVIDERS_CH3 (FDC2114, FDC2214 only)
      26. 9.6.26 Address 0x18, STATUS
      27. 9.6.27 Address 0x19, ERROR_CONFIG
      28. 9.6.28 Address 0x1A, CONFIG
      29. 9.6.29 Address 0x1B, MUX_CONFIG
      30. 9.6.30 Address 0x1C, RESET_DEV
      31. 9.6.31 Address 0x1E, DRIVE_CURRENT_CH0
      32. 9.6.32 Address 0x1F, DRIVE_CURRENT_CH1
      33. 9.6.33 Address 0x20, DRIVE_CURRENT_CH2 (FDC2114 / FDC2214 only)
      34. 9.6.34 Address 0x21, DRIVE_CURRENT_CH3 (FDC2114 / FDC2214 only)
      35. 9.6.35 Address 0x7E, MANUFACTURER_ID
      36. 9.6.36 Address 0x7F, DEVICE_ID
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Sensor Configuration
      2. 10.1.2 Shield
    2. 10.2 Typical Application
      1. 10.2.1 Schematic
      2. 10.2.2 Design Requirements
      3. 10.2.3 Detailed Design Procedure
        1. 10.2.3.1 Application Performance Plot
        2. 10.2.3.2 Recommended Initial Register Configuration Values
        3. 10.2.3.3 Inductor Self-Resonant Frequency
      4. 10.2.4 Application Curves
      5. 10.2.5 Power-Cycled Applications
    3. 10.3 Do's and Don'ts
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Power Supply Recommendations

The FDC requires a voltage supply within 2.7 V and 3.6 V. Multilayer ceramic bypass X7R capacitors of 0.1 μF and 1 μF between the VDD and GND pins are recommended. If the supply is located more than a few inches from the FDC, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. An electrolytic capacitor with a value of 10 μF is a typical choice.

The optimum placement is closest to the VDD and GND pins of the device. Care should be taken to minimize the loop area formed by the bypass capacitor connection, the VDD pin, and the GND pin of the device. See Figure 63 and Figure 63 for a layout example.