SBOS790 April   2017 INA233

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Accuracy Analog-to-Digital Convertor (ADC)
      2. 7.3.2 Interleaved Power Calculation
      3. 7.3.3 Power Accumulator and Energy Measurement
      4. 7.3.4 I2C-, SMBus-, and PMBus-Compatible Digital Interface
      5. 7.3.5 Multiple Fault Event Reporting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous verses Triggered Operation
      2. 7.4.2 Device Shutdown
      3. 7.4.3 Averaging and Conversion Time Considerations
      4. 7.4.4 Filtering and Input Considerations
    5. 7.5 Programming
      1. 7.5.1 Default Settings
      2. 7.5.2 Calibration Register and Scaling
      3. 7.5.3 Reading and Writing Telemetry Data and Warning Thresholds
      4. 7.5.4 Reading Telemetry Data and Warning Thresholds
        1. 7.5.4.1 Writing Telemetry Data and Warning Thresholds
      5. 7.5.5 System-Level Calibration With MFR_CALIRATION Command
      6. 7.5.6 Bus Overview
        1. 7.5.6.1 Serial Bus Address
        2. 7.5.6.2 Serial Interface
        3. 7.5.6.3 Writing to and Reading From the INA233
          1. 7.5.6.3.1 Packet Error Checking
          2. 7.5.6.3.2 Bus Timing Requirements
        4. 7.5.6.4 SMBus Alert Response
    6. 7.6 Register Maps
      1. 7.6.1 PMBus Command Support
      2. 7.6.2 Standard PMBus Commands
        1. 7.6.2.1  CLEAR_FAULTS (03h)
        2. 7.6.2.2  RESTORE_DEFAULT_ALL (12h)
        3. 7.6.2.3  CAPABILITY (19h)
        4. 7.6.2.4  IOUT_OC_WARN_LIMIT (4Ah) [default = 01111111 11111000]
        5. 7.6.2.5  VIN_OV_WARN_LIMIT (57h) [default = 01111111 11111000]
        6. 7.6.2.6  VIN_UV_WARN_LIMIT (58h) [default = 00000000 00000000]
        7. 7.6.2.7  PIN_OP_WARN_LIMIT (6Bh) [default = 11111111 11110000]
        8. 7.6.2.8  STATUS_BYTE (78h)
        9. 7.6.2.9  STATUS_WORD (79h)
        10. 7.6.2.10 STATUS_IOUT (7Bh)
        11. 7.6.2.11 STATUS_INPUT (7Ch)
        12. 7.6.2.12 STATUS_CML (7Eh)
        13. 7.6.2.13 STATUS_MFR_SPECIFIC (80h)
        14. 7.6.2.14 READ_EIN (86h)
        15. 7.6.2.15 READ_VIN (88h)
        16. 7.6.2.16 READ_IIN (89h)
        17. 7.6.2.17 READ_VOUT (8Bh)
        18. 7.6.2.18 READ_IOUT (8Ch, R)
        19. 7.6.2.19 READ_POUT (96h, R)
        20. 7.6.2.20 READ_PIN (97h, R)
        21. 7.6.2.21 MFR_ID (99h)
        22. 7.6.2.22 MFR_MODEL (9Ah)
        23. 7.6.2.23 MFR_REVISION (9Bh)
      3. 7.6.3 Manufacturer-Specific PMBus Commands
        1. 7.6.3.1 MFR_ADC_CONFIG (D0h) [default = 01000001 00100111]
        2. 7.6.3.2 MFR_READ_VSHUNT (D1h) [default = 00000000 00000000]
        3. 7.6.3.3 MFR_ALERT_MASK (D2h) [default = XXXXXXXX 11110000]
        4. 7.6.3.4 MFR_CALIBRATION (D4h) [default = 00000000 00000001]
        5. 7.6.3.5 MFR_DEVICE_CONFIG (D5h) [default = 00000010]
        6. 7.6.3.6 5.1.1 CLEAR_EIN (D6h)
        7. 7.6.3.7 TI_MFR_ID (E0h) [value = 01010100 01001001]
        8. 7.6.3.8 TI_MFR_MODEL (E1h) [value = 00110011 00110011]
        9. 7.6.3.9 TI_MFR_REVISION (E2h) [value = 01000001 00110000]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming the Calibration Register
        2. 8.2.2.2 Calculating PMBus Coefficients
        3. 8.2.2.3 Programming Warning Thresholds
        4. 8.2.2.4 Calculating Returned Telemetry Values
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VVS Supply voltage 6 V
Analog Inputs, IN+, IN– Differential (VIN+ – VIN–)(2) –40 40 V
Common-mode –0.3 40
VVBUS VBUS pin voltage –0.3 40 V
VSDA SDA, SCL pin voltages GND – 0.3 6 V
VA A0, A1 pin voltages GND – 0.3 6 V
IIN Input current into any pin 5 mA
IOUT Open-drain digital output current 10 mA
TJ Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) IN+ and IN– can have a differential voltage between –40 V and 40 V. However, the voltage at these pins must not exceed the range of –0.3 V to 40 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCM Common-mode input voltage 0 36 V
VVS Operating supply voltage 2.7 5.5 V
TA Operating free-air temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) INA233 UNIT
DGS (VSSOP)
10 PINS
RθJA Junction-to-ambient thermal resistance 171.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 42.9 °C/W
RθJB Junction-to-board thermal resistance 91.8 °C/W
ψJT Junction-to-top characterization parameter 1.5 °C/W
ψJB Junction-to-board characterization parameter 90.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

at TA = 25°C, VVS = 3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VVBUS = 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
Shunt voltage input range –81.92 81.9175 mV
Bus voltage input range(1) 0 36 V
CMRR Common-mode rejection ratio 0 V ≤ VIN+ ≤ 36 V 126 140 dB
VOS Offset voltage, RTI(2) Shunt voltage ±2.5 ±10 µV
Bus voltage ±1.25 ±7.5 mV
VOS (RTI(2)) vs temperature Shunt voltage, –40°C ≤ TA ≤ +125°C 0.02 0.1 µV/°C
Bus voltage, –40°C ≤ TA ≤ +125°C 10 40
PSRR Power-supply rejection ratio (RTI(2)) Shunt voltage, 2.7 V ≤ VS ≤ 5.5 V 1 µV/V
Bus voltage 0.5 mV/V
IB Input bias current (IIN+, IIN– pins) 8 μA
VBUS input impedance 830 kΩ
Input leakage(3) (IN+) + (IN–),
power-down mode		 0.1 0.5 µA
DC ACCURACY
ADC native resolution 16 Bits
1-LSB step size Shunt voltage 2.5 μV
Bus voltage 1.25 mV
Shunt voltage gain error 0.02% 0.1%
Shunt voltage gain error vs temperature –40°C ≤ TA ≤ +125°C 5 25 ppm/°C
Bus voltage gain error 0.02% 0.1%
Bus voltage gain error vs temperature –40°C ≤ TA ≤ +125°C 10 50 ppm/°C
Power gain error VBUS = 12 V, VIN+ – VIN– = –80 mV to 80 mV 0.05% 0.2%
Power gain error vs temperature –40°C ≤ TA ≤ +125°C 10 50 ppm/°C
DNL Differential nonlinearity ±0.1 LSB
tCT ADC conversion time CT bit = 000 140 154 µs
CT bit = 001 204 224
CT bit = 010 332 365
CT bit = 011 588 646
CT bit = 100 1.1 1.21 ms
CT bit = 101 2.116 2.328
CT bit = 110 4.156 4.572
CT bit = 111 8.244 9.068
SMBus
SMBus timeout(4) 28 35 ms
DIGITAL INPUT/OUTPUT
Input capacitance 3 pF
Leakage input current 0 V ≤ VSCL ≤ VVS,
0 V ≤ VSDA ≤ VVS,
0 V ≤ VAlert ≤ VVS,
0 V ≤ VA0 ≤ VVS,
0 V ≤ VA1 ≤ VVS 		0.5 2 µA
VIH High-level input voltage SDA pin 1.4 6 V
VIL Low-level input voltage SDA pin –0.3 0.4 V
VOL Low-level output voltage IOL = 3 mA, SDA and ALERT pins 0 0.4 V
Hysteresis 500 mV
POWER SUPPLY
Operating supply range 2.7 5.5 V
IQ Quiescent current 310 400 µA
Quiescent current, power-down (shutdown) mode 2 5 µA
VPOR Power-on-reset (POR) threshold voltage 2 V
(1) Although the input range is 36 V, the full-scale range of the ADC scaling is 40.96 V; see the High-Accuracy Analog-to-Digital Convertor (ADC) section. Do not apply more than 36 V.
(2) RTI = Referred-to-input.
(3) Input leakage is positive (current flowing into the pin) for the conditions shown at the top of this table. Negative leakage currents can occur under different input conditions.
(4) SMBus timeout in the INA233 resets the interface whenever SCL is low for more than 28 ms.

6.6 Typical Characteristics

at TA = 25°C, VVS = 3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VVBUS = 12 V (unless otherwise noted)
INA233 g001_bos547.gif
Figure 1. Frequency Response
INA233 D003_SBOS790.gif
Figure 3. Shunt Input Offset Voltage vs Temperature
INA233 D005_SBOS790.gif
Figure 5. Shunt Input Gain Error Production Distribution
INA233 D007_SBOS790.gif
Figure 7. Shunt Input Gain Error vs Common-Mode Voltage
INA233 D009_SBOS790.gif
Figure 9. Bus Input Offset Voltage vs Temperature
INA233 D011_SBOS790.gif
Figure 11. Bus Input Gain Error vs Temperature
INA233 D013_SBOS790.gif
Figure 13. Power Gain Error vs Temperature
INA233 D024_SBOS790.gif
Figure 15. Power-Supply Rejection Distribution
INA233 D017_SBOS790.gif
(IN+) + (IN–)
Figure 17. Input Bias Current vs Temperature
INA233 D019_SBOS790.gif
Figure 19. Active IQ vs Temperature
INA233 D021_SBOS790.gif
Figure 21. Active IQ vs SCL Frequency
INA233 D002_SBOS790.gif
Figure 2. Shunt Input Offset Voltage Production Distribution
INA233 D004_SBOS790.gif
Figure 4. Shunt Input CMRR vs Temperature
INA233 D006_SBOS790.gif
Figure 6. Shunt Input Gain Error vs Temperature
INA233 D008_SBOS790.gif
Figure 8. Bus Input Offset Voltage Production Distribution
INA233 D010_SBOS790.gif
Figure 10. Bus Input Gain Error Production Distribution
INA233 D012_SBOS790.gif
Figure 12. Power Gain Error Production Distribution
INA233 D023_SBOS790.gif
Figure 14. Input Common-Mode Rejection Distribution
INA233 D016_SBOS790.gif
(IN+) + (IN–)
Figure 16. Input Bias Current vs Common-Mode Voltage
INA233 D018_SBOS790.gif
(IN+) + (IN–)
Figure 18. Input Bias Shutdown Current vs Temperature
INA233 D020_SBOS790.gif
Figure 20. Shutdown IQ vs Temperature
INA233 D022_SBOS790.gif
Figure 22. Shutdown IQ vs SCL Frequency