SBOS445C July  2008  – December 2015 INA333


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
    4. 7.4Device Functional Modes
      1. 7.4.1Internal Offset Correction
      2. 7.4.2Input Common-Mode Range
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
        1. Setting the Gain
        2. Internal Offset Correction
        3. Offset Trimming
        4. Noise Performance
        5. Input Bias Current Return Path
        6. Input Common-Mode Range
        7. Operating Voltage
        8. Low Voltage Operation
        9. Single-Supply Operation
        10. Protection
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Device Support
      1. 11.1.1Development Support
        1. (Free Download Software)
    2. 11.2Documentation Support
      1. 11.2.1Related Documentation
    3. 11.3Trademarks
    4. 11.4Electrostatic Discharge Caution
    5. 11.5Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

8 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The INA333 measures small differential voltage with high common-mode voltage developed between the noninverting and inverting input. The high input impedance makes the INA333 suitable for a wide range of applications. The ability to set the reference pin to adjust the functionality of the output signal offers additional flexibility that is practical for multiple configurations.

8.2 Typical Application

Figure 32 shows the basic connections required for operation of the INA333 device. Good layout practice mandates the use of bypass capacitors placed close to the device pins as shown.

The output of the INA333 device is referred to the output reference (REF) pin, which is normally grounded. This connection must be low-impedance to assure good common-mode rejection. Although 15 Ω or less of stray resistance can be tolerated while maintaining specified CMRR, small stray resistances of tens of Ωs in series with the REF pin can cause noticeable degradation in CMRR.

INA333 ai_basic_connex_bos445.gif Figure 32. Basic Connections

8.2.1 Design Requirements

The device can be configured to monitor the input differential voltage when the gain of the input signal is set by the external resistor RG. The output signal references to the Ref pin. The most common application is where the output is referenced to ground when no input signal is present by connecting the Ref pin to ground. When the input signal increases, the output voltage at the OUT pin increases, too.

8.2.2 Detailed Design Procedure Setting the Gain

Gain of the INA333 device is set by a single external resistor, RG, connected between pins 1 and 8. The value of RG is selected according to Equation 1:

Equation 1. G = 1 + (100 kΩ / RG)

Table 1 lists several commonly-used gains and resistor values. The 100 kΩ in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These on-chip resistors are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift specifications of the INA333 device.

The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The contribution of RG to gain accuracy and drift can be directly inferred from the gain Equation 1. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater. To ensure stability, avoid parasitic capacitance of more than a few picofarads at the RG connections. Careful matching of any parasitics on both RG pins maintains optimal CMRR over frequency.

Table 1. Commonly-Used Gains and Resistor Values

1NC(1) NC
(1) NC denotes no connection. When using the SPICE model, the simulation will not converge unless a resistor is connected to the RG pins; use a very large resistor value. Internal Offset Correction

The INA333 device internal operational amplifiers use an auto-calibration technique with a time-continuous 350-kHz operational amplifier in the signal path. The amplifier is zero-corrected every 8 μs using a proprietary technique. Upon power-up, the amplifier requires approximately 100 μs to achieve specified VOS accuracy. This design has no aliasing or flicker noise. Offset Trimming

Most applications require no external offset adjustment; however, if necessary, adjustments can be made by applying a voltage to the REF pin. Figure 33 shows an optional circuit for trimming the output offset voltage. The voltage applied to REF pin is summed at the output. The operational amplifier buffer provides low impedance at the REF pin to preserve good common-mode rejection.

INA333 ai_opt_trim_vo_bos445.gif Figure 33. Optional Trimming of Output Offset Voltage Noise Performance

The auto-calibration technique used by the INA333 device results in reduced low frequency noise, typically only 50 nV/√Hz, (G = 100). The spectral noise density can be seen in detail in Figure 8. Low frequency noise of the INA333 device is approximately 1 μVPP measured from 0.1 Hz to 10 Hz, (G = 100). Input Bias Current Return Path

The input impedance of the INA333 device is extremely high—approximately 100 GΩ. However, a path must be provided for the input bias current of both inputs. This input bias current is typically ±70 pA. High input impedance means that this input bias current changes very little with varying input voltage.

Input circuitry must provide a path for this input bias current for proper operation. Figure 34 shows various provisions for an input bias current path. Without a bias current path, the inputs float to a potential that exceeds the common-mode range of the INA333 device, and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 34). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage as a result of bias current and better high-frequency common-mode rejection.

INA333 ai_in_cm_path_bos445.gif Figure 34. Providing an Input Common-Mode Current Path Input Common-Mode Range

The linear input voltage range of the input circuitry of the INA333 device is from approximately 0.1 V below the positive supply voltage to 0.1 V above the negative supply. As a differential input voltage causes the output voltage to increase, however, the linear input range is limited by the output voltage swing of amplifiers A1 and A2. Thus, the linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also depends on supply voltage—see Figure 20 to Figure 23 in the Typical Characteristics section.

Input overload conditions can produce an output voltage that appears normal. For example, if an input overload condition drives both input amplifiers to the respective positive output swing limit, the difference voltage measured by the output amplifier is near zero. The output of the INA333 is near 0 V even though both inputs are overloaded. Operating Voltage

The INA333 operates over a power-supply range of 1.8 V to 5.5 V (±0.9 V to ±2.75 V). Supply voltages higher than 7 V (absolute maximum) can permanently damage the device. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. Low Voltage Operation

The INA333 device can be operated on power supplies as low as ±0.9 V. Most parameters vary only slightly throughout this supply voltage range—see the Typical Characteristics section. Operation at very low supply voltage requires careful attention to assure that the input voltages remain within the linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low power-supply voltage. Figure 20 to Figure 23 show the range of linear operation for various supply voltages and gains. Single-Supply Operation

The INA333 device can be used on single power supplies of 1.8 V to 5.5 V. Figure 35 shows a basic single-supply circuit. The output REF pin is connected to mid-supply. Zero differential input voltage demands an output voltage of mid-supply. Actual output voltage swing is limited to approximately 50 mV more than ground, when the load is referred to ground as shown. Figure 29 shows how the output voltage swing varies with output current.

With single-supply operation, VIN+ and VIN– must both be 0.1 V more than ground for linear operation. For instance, the inverting input cannot be connected to ground to measure a voltage connected to the noninverting input.

To show the issues affecting low voltage operation, consider the circuit in Figure 35. It shows the INA333 device operating from a single 3-V supply. A resistor in series with the low side of the bridge assures that the bridge output voltage is within the common-mode range of the amplifier inputs.

INA333 ai_1sup_bridge_bos445.gif
1. R1 creates proper common-mode voltage, only for low-voltage operation—see Single-Supply Operation.
Figure 35. Single-Supply Bridge Amplifier Input Protection

The input pins of the INA333 device are protected with internal diodes connected to the power-supply rails. These diodes clamp the applied signal to prevent it from damaging the input circuitry. If the input signal voltage can exceed the power supplies by more than 0.3 V, the input signal current should be limited to less than 10 mA to protect the internal clamp diodes. This current limiting can generally be done with a series input resistor. Some signal sources are inherently current-limited and do not require limiting resistors.

8.2.3 Application Curves

INA333 tc_lg_resp_1g_bos445.gif
Figure 36. Large Signal Response
INA333 tc_sm_resp_1g_bos445.gif
Figure 38. Small-Signal Step Response
INA333 tc_lg_resp_100g_bos445.gif
Figure 37. Large-Signal Step Response
INA333 tc_sm_resp_100g_bos445.gif
Figure 39. Small-Signal Step Response