SBOS792A August   2017  – January 2018 INA828

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      INA828 Simplified Internal Schematic
      2.      Typical Distribution of Input Offset Voltage Drift
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Setting the Gain
        1. 7.3.1.1 Gain Drift
      2. 7.3.2 EMI Rejection
        1. Table 2. INA828 EMIRR for Frequencies of Interest
      3. 7.3.3 Input Common-Mode Range
      4. 7.3.4 Input Protection
      5. 7.3.5 Operating Voltage
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Reference Terminal
    2. 8.2 Input Bias Current Return Path
    3. 8.3 PCB Assembly Effects on Precision
    4. 8.4 Typical Application
      1. 8.4.1 Design Requirements
      2. 8.4.2 Detailed Design Procedure
      3. 8.4.3 Application Curves
    5. 8.5 Other Application Examples
      1. 8.5.1 Resistance Temperature Detector Interface
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1.1 Gain Drift

The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The contribution of RG to gain accuracy and drift can be determined from Equation 1.

The best gain drift of 5 ppm/℃ (maximum) can be achieved when the INA828 uses G = 1 without RG connected. In this case, gain drift is limited only by the slight mismatch of the temperature coefficient of the integrated 40-kΩ resistors in the differential amplifier (A3). At gains greater than 1, gain drift increases as a result of the individual drift of the 25-kΩ resistors in the feedback of A1 and A2, relative to the drift of the external gain resistor RG. The low temperature coefficient of the internal feedback resistors significantly improves the overall temperature stability of applications using gains greater than 1 V/V over alternate solutions.

Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error (such as a possible unstable gain error) at gains of approximately 100 or greater. To assure stability, avoid parasitic capacitance of more than a few picofarads at RG connections. Careful matching of any parasitics on both RG pins maintains optimal CMRR over frequency; see Typical Characteristics, Figure 17.