SNOSCZ7A December 2015 – January 2016 LDC0851
PRODUCTION DATA.
The LDC0851 requires minimal external components for effective operation. An LDC0851 design should follow good layout techniques - providing good grounding and clean supplies are critical for optimum operation. Due to the small physical size of the LDC0851, use of surface mount 0402 or smaller components can ease routing. It is important to keep the routing symmetrical and minimize parasitic capacitances for LSENSE and LREF. The sensor capacitor should be placed close to the IC and keep traces far apart to minimize the effects of parasitic capacitance. For optimum performance, it is recommended to use a C0G/NP0 for the sensor capacitor.
The use of side by side coils is recommended for many applications that require a 2 layer PCB or that require very accurate temperature compensation. For side by side coils it is recommended to put them on the same PCB, even if using a remote sensing application. This will keep the tolerances and mismatch between the coils as small as possible. An example layout of side by side coils is shown in Figure 34.
Use of stacked coils may be desirable to conserve board space and to prevent false triggering when a target approaches from the bottom. A 4 layer PCB with a thick inner layer is recommended to achieve the best results. It is important to note the direction and polarity of the sense coil and reference coils with respect to each other. The recommended configuration is shown below.