The LM5108 is a high frequency half-bridge gate driver with maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge configuration based topologies such as synchronous buck, full bridge, active clamp forward, LLC, and synchronous boost.
The device has interlock functionality which, prevents both outputs from being high at the same time, in the case when both of the inputs are high. This interlock feature improves system robustness in motor drive and power tools applications. Enable and disable functionality allows for the flexible and fast control of the power stage. Battery powered tools can also use enable feature of the LM5108 to reduce the standby current as well as to respond to system fault. The inputs are independent of supply voltage and can have independent pulse width. This allows maximum control flexibility. Both inputs and enable have sufficient hysteresis to improve the system robustness in noise prone applications such as motor drives.
The low-side and the high-side outputs are matched to 1-ns between the turn-on and turn-off of each other. This allows for dead-time optimization which in-turn improves efficiency. 5-V UVLO allows the driver to operate at lower bias supplies which further allows the power stage to operate at higher switching frequency without increasing switching losses. VDD and HB UVLO threshold specifications are designed in such as way that both the high-side and low-side driver turns on typically at 5 V. If both VDD and HB UVLO thresholds are the same then designer would need higher bias supply than the VDD UVLO threshold to turn-on both high-side and low-side driver.
An on-board bootstrap diode eliminates the need for an external discrete diode which improves board space utilization. Small package enables dense power designs such as power tools.
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|Part number||Order||Number of channels (#)||Power switch||Bus voltage (Max) (V)||Peak output current (A)||Input VCC (Min) (V)||Input VCC (Max) (V)||Rise time (ns)||Fall time (ns)||Prop delay (ns)||Iq (uA)||Input threshold||Channel input logic||Negative voltage handling at HS pin (V)||Features||Rating||Operating temperature range (C)||Package Group|
||2||MOSFET||110||2.6||6||16||11||8||20||0.28||TTL||TTL||-5||Enable and Interlock||Catalog||-40 to 125||VSON | 10|
||2||MOSFET||100||2||9||14||10||10||25||10||TTL||TTL||-1||Catalog||-40 to 125||
SOIC | 8
WSON | 10
||2||MOSFET||100||1||9||14||10||10||25||10||TTL||TTL||-1||Catalog||-40 to 125||
HVSSOP | 8
SOIC | 8
WSON | 10
||2||MOSFET||90||1||8||14||15||15||25||10||TTL||TTL||-1||Catalog||-40 to 125||
SOIC | 8
WSON | 8