SNAS558M February 2000  – July 2016 LMC555


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1Low-Power Dissipation
      2. 8.3.2Various Packages and Compatibility
      3. 8.3.3Operates in Both Astable and Monostable Mode
    4. 8.4Device Functional Modes
      1. 8.4.1Monostable Operation
      2. 8.4.2Astable Operation
  9. Application and Implementation
    1. 9.1Application Information
    2. 9.2Typical Application
      1. 9.2.1Design Requirements
      2. 9.2.2Detailed Design Procedure
      3. 9.2.3Application Curve
    3. 9.3Frequency Divider
      1. 9.3.1Design Requirements
      2. 9.3.2Application Curve
    4. 9.4Pulse Width Modulator
      1. 9.4.1Design Requirements
      2. 9.4.2Application Curve
    5. 9.5Pulse Position Modulator
      1. 9.5.1Design Requirements
      2. 9.5.2Application Curve
    6. 9.650% Duty Cycle Oscillator
      1. 9.6.1Design Requirements
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation SupportChanged layout of National Semiconductor Data Sheet to TI format
    1. 12.1Receiving Notification of Documentation Updates
    2. 12.2Community Resources
    3. 12.3Trademarks
    4. 12.4Electrostatic Discharge Caution
    5. 12.5Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

1 Features

  • Industry's Fastest Astable Frequency of 3 MHz
  • Available in Industry's Smallest 8-Bump DSBGA Package (1.43mm × 1.41mm)
  • Less Than 1 mW Typical Power Dissipation at 5 V Supply
  • 1.5 V Supply Operating Voltage Ensured
  • Output Fully Compatible With TTL and CMOS Logic at 5 V Supply
  • Tested to −10 mA, 50 mA Output Current Levels
  • Reduced Supply Current Spikes During Output Transitions
  • Extremely Low Reset, Trigger, and Threshold Currents
  • Excellent Temperature Stability
  • Pin-for-Pin Compatible With 555 Series of Timers

2 Applications

  • Precision Timing
  • Pulse Generation
  • Sequential Timing
  • Time Delay Generation
  • Pulse Width Modulation
  • Pulse Position Modulation
  • Linear Ramp Generators

3 Description

The LMC555 device is a CMOS version of the industry standard 555 series general-purpose timers. In addition to the standard package (SOIC, VSSSOP, and PDIP) the LMC555 is also available in a chip-sized package (8-bump DSBGA) using TI's DSBGA package technology. The LMC555 offers the same capability of generating accurate time delays and frequencies as the LM555 but with much lower power dissipation and supply current spikes. When operated as a one-shot, the time delay is precisely controlled by a single external resistor and capacitor. In the astable mode the oscillation frequency and duty cycle are accurately set by two external resistors and one capacitor. The use of TI's LMCMOS process extends both the frequency range and the low supply capability.

Device Information(1)

LMC555SOIC (8)4.90 mm × 3.91 mm
VSSOP (8)3.00 mm × 3.00 mm
PDIP (8)9.81 mm × 6.35 mm
DSBGA (8)1.43 mm × 1.41 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Pulse Width Modulator

LMC555 866920.png

Pulse Width Modulator Waveform:
Top Waveform - Modulation
Bottom Waveform - Output Voltage

LMC555 866915.png