LMK04208 Ultra Low Noise Clock Jitter Cleaner With 6 Programmable Outputs | TI.com

LMK04208
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Ultra Low Noise Clock Jitter Cleaner With 6 Programmable Outputs

 

Description

The LMK04208 is a high performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLLatinum™ architecture is capable of 111 fs, RMS jitter (12 kHz to 20 MHz) using a low-noise VCXO module or sub-200 fs rms jitter (12 kHz to 20 MHz) using a low cost external crystal and varactor diode.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides low-noise jitter cleaner functionality while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When paired with a very narrow loop bandwidth, PLL1 uses the superior close-in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

Features

  • Ultra-Low RMS Jitter Performance
    • 111 fs, RMS Jitter (12 kHz to 20 MHz)
    • 123 fs, RMS Jitter (100 Hz to 20 MHz)
  • Dual Loop PLLatinum™ PLL Architecture
  • PLL1
    • Integrated Low-Noise Crystal Oscillator Circuit
    • Holdover Mode when Input Clocks are Lost
      • Automatic or Manual Triggering/Recovery
  • PLL2
    • Normalized PLL Noise Floor of –227 dBc/Hz
    • Phase Detector Rate of Up to 155 MHz
    • OSCin Frequency-Doubler
    • Integrated Low-Noise VCO or External VCO Mode
  • Two Redundant Input Clocks with LOS
    • Automatic and Manual Switch-Over Modes
  • 50 % Duty Cycle Output Divides, 1 to 1045 (Even and Odd)
  • 6 LVPECL, LVDS, or LVCMOS Programmable Outputs
  • Digital Delay: Fixed or Dynamically Adjustable
  • 25 ps Step Analog Delay Control
  • 7 Differential Outputs, Up to 14 Single-Ended
    • Up to 6 VCXO/Crystal Buffered Outputs
  • Clock Rates of Up to 1536 MHz
  • 0-Delay Mode
  • Three Default Clock Outputs at Power Up
  • Multi-Mode: Dual PLL, Single PLL, and Clock Distribution
  • Industrial Temperature Range: –40°C to +85°C
  • 3.15-V to 3.45-V Operation
  • 64-Pin WQFN Package (9.0 × 9.0 × 0.8 mm)

WEBENCH® Designer LMK04208

Recommend Input Frequency Output Frequencies
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Input Frequency  MHz
 MHz  MHz

Parametrics

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Part number Order Function Number of outputs Output frequency (Min) (MHz) Output frequency (Max) (MHz) Supply voltage (Min) (V) RMS jitter Supply voltage (Max) (V) Input type Output type Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Number of Inputs
LMK04208 Order now Single-loop PLL     7     0.329     3072     3.15     0.111     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     2    
LMK04610 Order now Single-loop PLL     10     0.03     2000     1.7     0.065     3.465     LVCMOS
LVDS
LVPECL    
LVDS
LVPECL    
Catalog     -40 to 85     QFN | 56     56QFN: 64 mm2: 8 x 8 (QFN | 56)     2    
LMK04616 Order now Single-loop PLL     16     0.03     2000     1.7     0.065     3.465     LVCMOS
LVDS
LVPECL    
LVDS
LVPECL    
Catalog     -40 to 85     NFBGA | 144     144NFBGA: 100 mm2: 10 x 10 (NFBGA | 144)     4    
LMK04808 Order now Dual-loop PLL     14     0.22     3072     3.15     0.111     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     2    
LMK04821 Order now Single-loop PLL     15     0.045     2075     3.15     0.091     3.45       LVCMOS
LVDS
LVPECL    
Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     3    
LMK04906 Order now Single-loop PLL     7     0.22     2600     3.15     0.1     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     3