LMK04906 Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs | TI.com

LMK04906
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs

 

Recommended alternative parts

  • LMK03806  - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device. 
  • LMK00301  -  10 Output Universal Fan Out Buffer from the LMK04906 clock generator
  • LMK00304  -  4 Output Universal Fan Out Buffer from the LMK04906 clock generator
  • LMK00306  -  6 Output Universal Fan Out Buffer from the LMK04906 clock generator
  • LMK00308  -  8 Output Universal Fan Out Buffer from the LMK04906 clock generator
  • LMK00101  -  10 Output Universal Fan Out Buffer from the LMK04906 clock generator

Description

The LMK04906 is the industry’s highest performance clock jitter attenuator with superior clock jitter cleaning, generation, and distribution with advanced features to meet high performance timing application needs.

The LMK04906 accepts 3 clock inputs ranging from 1 kHz to 500 MHz and generates 6 unique clock output frequencies ranging from 284 kHz to 2.6 GHz. The LMK04906 can also buffer a crystal or VCXO to generate a 7th unique clock frequency.

The device provides virtually all frequency translation combinations required for SONET, Ethernet, Fibre Channel and multi-mode Wireless Base Stations.

The LMK04906 input clock frequency and clock multiplication ratio are programmable through a SPI interface.

Features

  • Ultralow RMS Jitter Performance
    • 100-fs RMS Jitter (12 kHz to 20 MHz)
    • 123-fs RMS Jitter (100 Hz to 20 MHz)
  • Dual Loop PLLatinum™ PLL Architecture
    • PLL1
      • Integrated Low-Noise Crystal Oscillator Circuit
      • Holdover Mode when Input Clocks are Lost
        • Automatic or Manual Triggering/Recovery
    • PLL2
      • Normalized [1 Hz] PLL Noise Floor of –227 dBc/Hz
      • Phase Detector Rate up to 155 MHz
      • OSCin Frequency-doubler
      • Integrated Low-Noise VCO
  • 3 Redundant Input Clocks with LOS
    • Automatic and Manual Switch-Over Modes
  • 50% Duty Cycle Output Divides, 1 to 1045 (Even and Odd)
  • LVPECL, LVDS, or LVCMOS Programmable Outputs
  • Precision Digital Delay, Fixed or Dynamically Adjustable
  • 25-ps Step Analog Delay Control.
  • 6 Differential Outputs. Up to 12 Single Ended.
    • Up to 5 VCXO/Crystal Buffered Outputs
  • Clock Rates of up to 2600 MHz
  • 0-Delay Mode
  • Three Default Clock Outputs at Power Up
  • Multi-mode: Dual PLL, Single PLL, and Clock Distribution
  • Industrial Temperature Range: –40 to 85 °C
  • 3.15-V to 3.45-V Operation
  • Package: 64-Pin WQFN (9 mm × 9 mm × 0.8 mm)

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Parametrics

Compare all products in Clock jitter cleaners & synchronizers Email Download to Excel
Part number Order Function Number of outputs Output frequency (Min) (MHz) Output frequency (Max) (MHz) Supply voltage (Min) (V) RMS jitter Supply voltage (Max) (V) Input type Output type Features Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Number of Inputs
LMK04906 Order now Dual-loop PLL     7     0.22     2600     3.15     0.1     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
0 Delay     Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     3    
LMK04208 Order now Dual-loop PLL     7     0.329     3072     3.15     0.111     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
0 Delay     Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     2    
LMK04805 Order now Cascaded PLLs     14     0.22     2370     3.15     0.111     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
0 Delay     Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     2    
LMK04806 Order now Cascaded PLLs     14     0.22     2600     3.15     0.111     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
0 Delay     Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     2    
LMK04808 Order now Dual-loop PLL     14     0.22     3072     3.15     0.111     3.45     LVCMOS
LVDS
LVPECL    
LVCMOS
LVDS
LVPECL    
0 Delay     Catalog     -40 to 85     WQFN | 64     64WQFN: 81 mm2: 9 x 9 (WQFN | 64)     2