SNAS676D October 2015  – October 2017 LMK61A2-100M , LMK61A2-125M , LMK61A2-156M , LMK61A2-312M , LMK61A2-644M , LMK61E0-050M , LMK61E0-155M , LMK61E0-156M , LMK61E2-100M , LMK61E2-125M , LMK61E2-156M , LMK61E2-312M , LMK61I2-100M

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - Power Supply
    6. 6.6 LVPECL Output Characteristics
    7. 6.7 LVDS Output Characteristics
    8. 6.8 HCSL Output Characteristics
    9. 6.9 OE Input Characteristics
    10. 6.10Frequency Tolerance Characteristics
    11. 6.11Power-On/Reset Characteristics (VDD)
    12. 6.12PSRR Characteristics
    13. 6.13PLL Clock Output Jitter Characteristics
    14. 6.14Typical 156.25-MHz Output Phase Noise Characteristics
    15. 6.15Additional Reliability and Qualification
    16. 6.16Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1Device Output Configurations
  8. Power Supply Recommendations
  9. Layout
    1. 9.1Layout Guidelines
      1. 9.1.1Ensuring Thermal Reliability
      2. 9.1.2Best Practices for Signal Integrity
      3. 9.1.3Recommended Solder Reflow Profile
  10. 10Device and Documentation Support
    1. 10.1Related Links
    2. 10.2Receiving Notification of Documentation Updates
    3. 10.3Community Resources
    4. 10.4Trademarks
    5. 10.5Electrostatic Discharge Caution
    6. 10.6Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Features

  • Ultra-low Noise, High Performance
    • Jitter: 90 fs RMS Typical Fout > 100 MHz
    • PSRR: –70 dBc, Robust Supply Noise Immunity
  • Supported Output Format
    • LVPECL up to 1 GHz
    • LVDS up to 900 MHz
    • HCSL up to 400 MHz
  • Total Frequency Tolerance of ± 50 ppm (LMK61X2) and ± 25 ppm (LMK61X0)
  • 3.3-V Operating Voltage
  • Industrial Temperature Range (–40ºC to +85ºC)
  • 7 mm × 5 mm 6-Pin Package, Pin-Compatible With Industry Standard 7050 XO Package

Applications

  • High-Performance Replacement for Crystal, SAW, or Silicon-Based Oscillators
  • Switches, Routers, Network Line Cards, Base Band Units (BBU), Servers, Storage/SAN
  • Test and Measurement
  • Medical Imaging
  • FPGA, Processor Attach

Description

The LMK61XX is an ultra-low jitter oscillator that generates a commonly used reference clock. The device is pre-programmed in factory to support any reference clock frequency; supported output formats are LVPECL up to 1 GHz, LVDS up to 900 MHz, and HCSL up to 400 MHz. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3 V ± 5% supply.

Device Information(1)

PART NUMBEROUTPUT FREQ (MHz) AND FORMATTOTAL FREQ STABILITY (PPM)PACKAGE
LMK61A2-100M00100 LVDS± 506-pin QFM (7.0 mm x 5.0 mm)
LMK61A2-125M00125 LVDS± 50
LMK61A2-156M25156.25 LVDS± 50
LMK61A2-312M50312.5 LVDS± 50
LMK61A2-644M53644.53125 LVDS± 50
LMK61E0-050M0050 LVPECL± 25
LMK61E0-155M52155.52 LVPECL± 25
LMK61E0-156M25156.25 LVPECL± 25
LMK61E2-100M00100 LVPECL± 50
LMK61E2-125M00125 LVPECL± 50
LMK61E2-156M25156.25 LVPECL± 50
LMK61E2-312M50312.5 LVPECL± 50
LMK61I2-100M00100 HCSL± 50
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Pinout