SNAS634B March 2014  – January 2016 LMP92066

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6Timing Requirements
    7. 7.7Output Switching Characteristics
    8. 7.8Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Features Description
      1. 8.3.1Temperature Sensor
      2. 8.3.2Look-Up-Table (LUT) and Arithmetic-Logic Unit (ALU)
        1. 8.3.2.1LUT and ALU Organization
        2. 8.3.2.2LUT Coefficient to Register Mapping
        3. 8.3.2.3The LUT Input and Output Ranges
      3. 8.3.3Analog Signal Path
        1. 8.3.3.1DAC
        2. 8.3.3.2Buffer Amplifier
        3. 8.3.3.3Output On and Off Control
      4. 8.3.4Memory
        1. 8.3.4.1READ and WRITE Access
        2. 8.3.4.2Access Control
        3. 8.3.4.3LUT, NOTEPAD Storage, and EEPROM
      5. 8.3.5I2C Interface
        1. 8.3.5.1Supported Data Transfer Formats
        2. 8.3.5.2Slave Address Selection
    4. 8.4Device Functional Modes
      1. 8.4.1Default Operating Mode
      2. 8.4.2Temperature Sensor Override
      3. 8.4.3ALU Bypass
      4. 8.4.4DAC Input Override
      5. 8.4.5LDMOS and GaN Drives
    5. 8.5Programming
      1. 8.5.1 Temperature Sensor Output Data Access Registers
      2. 8.5.2 DAC Input Data Registers
      3. 8.5.3 Temperature Sensor Status Register
      4. 8.5.4 Override Control Register
      5. 8.5.5 Override Data Registers
      6. 8.5.6 EEPROM Control Register
      7. 8.5.7 Software RESET Register
      8. 8.5.8 Access Control Register
      9. 8.5.9 Block I2C Access Control Register
      10. 8.5.10I2C Address LOCK Register
      11. 8.5.11Output Drive Supply Status Register
      12. 8.5.12Device Version Register
      13. 8.5.13EEPROM Burn Counter
      14. 8.5.14LUT Coefficient Registers
      15. 8.5.15LUT Control Registers
      16. 8.5.16Notepad Registers
    6. 8.6Register Map
  9. Application and Implementation
    1. 9.1Application Information
    2. 9.2Typical Applications
      1. 9.2.1Temperature Compensated Bias Generator for LDMOS Power Amplifer (PA)
        1. 9.2.1.1Design Requirements
        2. 9.2.1.2Detailed Design Requirements
        3. 9.2.1.3Application Curves
      2. 9.2.2Temperature Compensated Bias Generator for GaN Power Amplifer (PA)
        1. 9.2.2.1Design Requirements
        2. 9.2.2.2Detailed Design Procedure
        3. 9.2.2.3Application Curves
    3. 9.3Do's and Don'ts
      1. 9.3.1Output Drive Switching
    4. 9.4Initialization Setup
      1. 9.4.1Factory Default
      2. 9.4.2At Power Up
  10. 10Power Supply Recommendations
    1. 10.1VDD Supply Sourcing
    2. 10.2IVDD During EEPROM BURN
    3. 10.3IVDD During EEPROM TRANSFER
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Device Support
      1. 12.1.1Device Nomenclature
    2. 12.2Trademarks
    3. 12.3Electrostatic Discharge Caution
    4. 12.4Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information

1 Features

  • Internal 12-Bit Temperature Sensor
    • Accuracy (–40°C to 120°C), ±3.2°C (maximum)
  • Two Independent Transfer Functions Stored in EEPROM
  • Dual-Analog Output
    • Two 12-Bit DACs
    • Output Range 0 V to 5 V or 0 V to –5 V
    • High-Capacitive Load Tolerant, up to 10 µF
    • Post-Calibration Accuracy ±2.4 mV (typical)
  • Output On/Off Control Switching Time 50 ns (typical)
    • Switching Time 50 ns (typical)
    • RDSON 5 Ω (maximum)
  • I2C Interface: Standard and Fast
    • Nine Selectable Slave Addresses
    • TIMEOUT Function
  • VDD Supply Range 4.75 V to 5.25 V
  • VIO Range 1.65 V to 3.6 V
  • Specified Temperature Range –25°C to 120°C
  • Operating Temperature Range –40°C to 125°C

2 Applications

  • GaN or LDMOS PA Bias Controller
  • Sensor Temperature Compensation
  • Timing Circuit Temperature Compensation

3 Description

The LMP92066 is a highly integrated temperature-controlled dual DAC. Both DACs can be programmed by two independent, user-defined, temperature-to-voltage transfer functions stored in the internal EEPROM, allowing any temperature effects to be corrected without additional external circuitry. Once powered up, the device operates autonomously, without intervention from the system controller, to provide a complete solution for setting and compensating bias voltages and currents in control applications.

The LMP92066 has two analog outputs that support two output ranges: zero to plus five volts and zero to minus five volts. Each output can be switched to the load individually through the use of the dedicated control pin. The output switching is designed for rapid response, making the device suitable for the RF Power Amplifier biasing applications.

The EEPROM is verified for 100 write operations, enabling repeated field updates. The EEPROM programming is completed upon the user-issued I2C command.

The LMP92066’s digital ports interface to a variety of system controllers, as the dedicated VIO pin sets the digital I/O levels. The device is available in the thermally enhanced PowerPAD™ package, enabling precise PCB temperature measurement.

Device Information

PART NUMBERPACKAGE BODY SIZE
LMP92066HTSSOP (16)5.00 mm x 4.40 mm

4 Simplified Schematic

LMP92066 simplified_schematic.gif

Residual Error After One Point Calibration

LMP92066 C009_snas634.png