SNAS744B July   2017  – March 2018 LMS3655

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
      2.      LMS3655 Efficiency: VOUT = 5 V
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Thermal Information (for Device Mounted on PCB)
    6. 7.6 Electrical Characteristics
    7. 7.7 System Characteristics
    8. 7.8 Timing Requirements
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
      1. 8.2.1 Control Scheme
    3. 8.3 Feature Description
      1. 8.3.1 RESET Flag Output
      2. 8.3.2 Enable and Start-Up
      3. 8.3.3 Soft-Start Function
      4. 8.3.4 Current Limit
      5. 8.3.5 Hiccup Mode
      6. 8.3.6 Synchronizing Input
      7. 8.3.7 Undervoltage Lockout (UVLO) and Thermal Shutdown (TSD)
      8. 8.3.8 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 AUTO Mode
      2. 8.4.2 FPWM Mode
      3. 8.4.3 Dropout
      4. 8.4.4 Spread-Spectrum Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 General Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 External Components Selection
            1. 9.2.1.2.1.1 Input Capacitors
            2. 9.2.1.2.1.2 Output Inductors and Capacitors
              1. 9.2.1.2.1.2.1 Inductor Selection
              2. 9.2.1.2.1.2.2 Output Capacitor Selection
          2. 9.2.1.2.2 FB for Adjustable Output
          3. 9.2.1.2.3 VCC
          4. 9.2.1.2.4 BIAS
          5. 9.2.1.2.5 CBOOT
          6. 9.2.1.2.6 Maximum Ambient Temperature
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Adjustable 5-V Output
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Adjustable 3.3-V Output
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
      4. 9.2.4 6-V Adjustable Output
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curves
    3. 9.3 Do's and Don't's
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Electrical Characteristics

Limits apply over the recommended operating junction temperature range of –40°C to +150°C, unless otherwise noted. Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 13.5 V.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VFB Initial reference voltage for 5-V and 3.3-V options VIN = 3.8 V to 36 V, TJ = 25°C –1% 1%
VIN = 3.8 V to 36 V –1.5% 1.5%
IQ Operating quiescent current; measured at VIN pin when enabled and not switching(1) VIN = 13.5 V, VBIAS = 5 V 7.5 16 µA
IB_NSW Bias current into BIAS pin, enabled, not switching VIN = 13.5 V, VBIAS = 5 V, FPWM = 0 V 53 62 µA
VIN = 13.5 V, VBIAS = 3.3 V, FPWM = 0 V 53 62
ISD Shutdown quiescent current; measured at VIN pin EN ≤ 0.4 V 2 3 µA
VIN-OPERATE Minimum input voltage to operate Rising 3.2 3.55 3.90 V
Falling 2.95 3.25 3.55
Hysteresis 0.28 0.3 0.4
VRESET RESET upper threshold voltage Rising, % of VOUT 105% 107% 110%
RESET lower threshold voltage Falling, % VOUT 92% 94% 96.5%
Magnitude of RESET lower threshold from steady state output voltage Steady-state output voltage and RESET falling threshold read at the same TJ and VIN 96%
VRESET_HYST RESET hysteresis as a percent of output voltage setpoint ±1%
VRESET_VALID Minimum input voltage for proper RESET function 50-µA pullup to RESET pin,
EN = 0 V, TJ= 25°C		 1.5 V
VOL Low level RESET function output voltage 50-µA pullup to RESET pin,
VIN = 1.5 V, EN = 0 V		 0.4 V
0.5-mA pullup to RESET pin,
VIN = 13.5 V, EN = 0 V		 0.4
1-mA pullup to RESET pin,
VIN = 13.5 V, EN = 3.3 V 		0.4
FSW Switching frequency VIN = 13.5 V, center frequency with spread spectrum, PWM operation 360 400 440 kHz
VIN = 13.5 V, without spread spectrum, PWM operation 360 400 440
FSYNC Sync frequency range 250 400 500 kHz
DSYNC Sync input duty cycle range High state input < 5.5 V and > 2.3 V 25% 75%
VFPWM FPWM input threshold voltage FPWM input high (MODE = FPWM) 1.5 V
FPWM input low (MODE = AUTO with diode emulation) 0.4
FPWM input hysteresis 0.15 1
FSSS Frequency span of spread spectrum operation ±3%
FPSS Spread-spectrum pattern frequency(2) 1.2 Hz
IFPWM FPWM leakage current VIN = 13.5 V, VFPWM = 3.3 V 1 µA
VIN = VFPWM = 13.5 V 1
ISYNC SYNC leakage current VIN = 13.5 V, VSYNC = 3.3 V 1 µA
VIN = VSYNC = 13.5 V 1
IL-HS High-side switch current limit LMS3655 6.7 8.5 9.5 A
IL-LS Low-side switch current limit LMS3655 6 7 7.7 A
IL-ZC Zero-cross current limit FPWM = low –0.02 A
IL-NEG Negative current limit FPWM = high –1.5
RDSON Power switch on-resistance High-side MOSFET RDSON,
VIN = 13 V, IL = 1 A		 60 130 mΩ
Low-side MOSFET RDSON,
VIN = 13 V, IL = 1 A		 40 80
VEN Enable input threshold voltage - rising Enable rising 1.7 2 V
VEN_HYST Enable threshold hysteresis 0.45 0.55 V
VEN_WAKE Enable wake-up threshold 0.4 V
IEN EN pin input current VIN = VEN = 13.5 V 2 3 µA
VCC Internal VCC voltage VIN = 13.5 V, VBIAS = 0 V 3.05 V
VIN = 13.5 V, VBIAS = 3.3 V 3.15
VCC_UVLO Internal VCC input undervoltage lockout VIN rising 2.7 V
Hysteresis below VCC-UVLO 185 mV
IFB Input current from FB to AGND FB = 1 V 20 nA
VREF Reference voltage TJ = 25°C 0.993 1 1.007 V
TJ = –40°C to 125°C 0.99 1 1.01
RRESET RDSON of RESEToutput Pull FB pin low. Sink 1-mA at RESET pin 50 120 Ω
VSYNC VIH 1.5 V
VIL 0.4
VHYST 0.15 1
TSD Thermal shutdown thresholds(2) Rising 160 185 °C
Hysteresis 15
DMAX Maximum switch duty cycle Fsw = 400 kHz 96%
While in dropout(2) 98%
(1) This is the current used by the device while not switching, open loop on the ATE. It does not represent the total input current from the regulator system.
(2) Ensured by Design, Not tested at production.