SNOSCZ3B August 2016  – November 2016 LPV801 , LPV802

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
    4. 7.4Device Functional Modes
      1. 7.4.1Negative-Rail Sensing Input
      2. 7.4.2Rail to Rail Output Stage
      3. 7.4.3Design Optimization for Nanopower Operation
      4. 7.4.4Driving Capacitive Load
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application: Three Terminal CO Gas Sensor Amplifier
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
      3. 8.2.3Application Curve
    3. 8.3Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Device Support
      1. 11.1.1Development Support
    2. 11.2Receiving Notification of Documentation Updates
    3. 11.3Community Resources
    4. 11.4Related Links
    5. 11.5Trademarks
    6. 11.6Electrostatic Discharge Caution
    7. 11.7Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Specifications

Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted) (1)
MINMAXUNIT
Supply voltage, Vs = (V+) - (V-)–0.36 V
Input pinsVoltage (2) (3) Common mode(V-) - 0.3(V+) + 0.3V
Differential(V-) - 0.3(V+) + 0.3V
Input pinsCurrent-1010mA
Output short current (4) ContinuousContinuous
Operating temperature–40125°C
Storage temperature, Tstg –65150°C
Junction temperature150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Not to exceed -0.3V or +6.0V on ANY pin, referred to V-
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be current-limited to 10 mA or less.
Short-circuit to Vs/2, one amplifer per package. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.

ESD Ratings

VALUEUNIT
V(ESD) Electrostatic dischargeHuman-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±250
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. Pins listed as ±750 V may actually have higher performance.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MINNOMMAXUNIT
Supply voltage (V+ – V–) 1.6 5.5 V
Specified temperature -40 125 °C

Thermal Information

THERMAL METRIC(1) LPV801
DBV (SOT-23)
5 PINS
LPV802
DGK (VSSOP)
8 PINS
UNIT
θJA Junction-to-ambient thermal resistance177.4184.2ºC/W
θJCtop Junction-to-case (top) thermal resistance133.975.3
θJB Junction-to-board thermal resistance36.3105.5
ψJT Junction-to-top characterization parameter23.613.5
ψJB Junction-to-board characterization parameter35.7103.9
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Electrical Characteristics

TA = 25°C, VS = 1.8V to 5 V, VCM = VOUT = VS/2, and RL≥ 10 MΩ to VS / 2, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
OFFSET VOLTAGE
VOS Input offset voltageVS = 1.8V, 3.3V, and 5V,
VCM = V-
0.55±3.5mV
VS = 1.8V, 3.3V, and 5V,
VCM = (V+) – 0.9 V
0.55±3.5
ΔVOS/ΔTInput offset drift VCM = V-TA = –40°C to 125°C1µV/°C
PSRRPower-supply rejection ratioVS = 1.8V to 5V, 
VCM = V-
1.660µV/V
INPUT VOLTAGE RANGE
VCM Common-mode voltage range VS = 5 V04.1V
CMRRCommon-mode rejection ratio, LPV801(V–) ≤ VCM ≤ (V+) – 0.9 V, VS= 5V7795dB
Common-mode rejection ratio, LPV802(V–) ≤ VCM ≤ (V+) – 0.9 V, VS= 5V8098dB
INPUT BIAS CURRENT
IB Input bias currentVS = 1.8V±100fA
IOS Input offset currentVS = 1.8V±100
INPUT IMPEDANCE
Differential7pF
Common mode3
NOISE
En Input voltage noiseƒ = 0.1 Hz to 10 Hz6.5 µVp-p
en Input voltage noise densityƒ = 100 Hz340nV/√Hz
ƒ = 1 kHz420
OPEN-LOOP GAIN
AOL Open-loop voltage gain(V–) + 0.3 V ≤ VO ≤ (V+) – 0.3 V, RL = 100 kΩ120dB
OUTPUT
VOH Voltage output swing from positive railVS = 1.8V, RL = 100 kΩ to V+/2103.5 mV
VOL Voltage output swing from negative railVS = 1.8V, RL = 100 kΩ to V+/22.510
ISC Short-circuit current VS = 3.3V, Short to VS/24.7mA
ZO Open loop output impedanceƒ = 1 KHz, IO = 0 A90
FREQUENCY RESPONSE
GBPGain-bandwidth product CL = 20 pF, RL = 10 MΩ, VS = 5V8kHz
SRSlew rate (10% to 90%)G = 1, Rising Edge, CL = 20 pF, VS = 5V2 V/ms
G = 1, Falling Edge, CL = 20 pF, VS = 5V2.1
POWER SUPPLY
IQ-LPV801 Quiescent CurrentVCM = V-, IO = 0, VS = 3.3 V450540nA
IQ-LPV802 Quiescent Current,
Per Channel
VCM = V-, IO = 0, VS = 3.3 V320415nA

Typical Characteristics

at TA = 25°C, RL = 10MΩ to VS/2 ,CL = 20pF, VCM = VS / 2V unless otherwise specified.
LPV801 LPV802 TG_811_Iq_Vs_Vs.png
VCM = V- LPV801 RL=No Load
Figure 1. Supply Current vs. Supply Voltage, LPV801
LPV801 LPV802 TG_Vos_Vcm_1p8.png
VS= 1.8V RL= 10MΩ
Figure 3. Typical Offset Voltage vs. Common Mode Voltage
LPV801 LPV802 TG_Vos_Vcm_5V.png
VS= 5V RL= 10MΩ
Figure 5. Typical Offset Voltage vs. Common Mode Voltage
LPV801 LPV802 IB_VCM_1p8V_m40.png
VS= 1.8V TA = -40°C
Figure 7. Input Bias Current vs. Common Mode Voltage
LPV801 LPV802 IB_VCM_1p8V_25C.png
VS= 1.8V TA = 25°C
Figure 9. Input Bias Current vs. Common Mode Voltage
LPV801 LPV802 IB_VCM_1p8V_125C.png
VS= 1.8V TA = 125°C
Figure 11. Input Bias Current vs. Common Mode Voltage
LPV801 LPV802 TG_Isrc_Vo_18V.png
VS= 1.8V RL= No Load
Figure 13. Output Swing vs. Sourcing Current, 1.8V
LPV801 LPV802 TG_Isrc_Vo_3p3.png
VS= 3.3V RL= No Load
Figure 15. Output Swing vs. Sourcing Current, 3.3V
LPV801 LPV802 TG_Isrc_Vo_5V.png
VS= 5V RL= No Load
Figure 17. Output Swing vs. Sourcing Current, 5V
LPV801 LPV802 TG_SSPULSE_1p8.png
TA = 25 RL= 10MΩ Vout = 200mVpp
VS= ±0.9V CL= 20pF AV = +1
Figure 19. Small Signal Pulse Response, 1.8V
LPV801 LPV802 TG_LSPULSE_1p8.png
TA = 25 RL= 10MΩ Vout = 1Vpp
VS= ±0.9V CL= 20pF AV = +1
Figure 21. Large Signal Pulse Response, 1.8V
LPV801 LPV802 802_CMRR_vs_Freq.png
TA = 25 RL= 10MΩ ΔVCM = 0.5Vpp
VS= 5V CL= 20p
VCM = Vs/2 AV = +1
Figure 23. CMRR vs Frequency
LPV801 LPV802 AVPH_5V_10M.png
TA = -40, 25, 125°C RL= 10MΩ VOUT = 200mVPP
VS= 5V CL= 20pF VCM = Vs/2
Figure 25. Open Loop Gain and Phase, 5V, 10 MΩ Load
LPV801 LPV802 AVPH_1p8V_1M.png
TA = -40, 25, 125°C RL= 1MΩ VOUT = 200mVPP
VS= 5V CL= 20pF VCM = Vs/2
Figure 27. Open Loop Gain and Phase, 5V, 1 MΩ Load
LPV801 LPV802 AVPH_5V_100k.png
TA = -40, 25, 125°C RL= 100kΩ VOUT = 200mVPP
VS= 5V CL= 20pF VCM = Vs/2
Figure 29. Open Loop Gain and Phase, 5V, 100kΩ Load
LPV801 LPV802 AVPH_1p8V_10M.png
TA = -40, 25, 125°C RL= 10MΩ VOUT = 200mVPP
VS= 1.8V CL= 20pF VCM = Vs/2
Figure 31. Open Loop Gain and Phase, 1.8V, 10 MΩ Load
LPV801 LPV802 AVPH_1p8V_1M.png
TA = -40, 25, 125°C RL= 1MΩ VOUT = 200mVPP
VS= 1.8V CL= 20pF VCM = Vs/2
Figure 33. Open Loop Gain and Phase, 1.8V, 1 MΩ Load
LPV801 LPV802 AVPH_1p8V_100k.png
TA = -40, 25, 125°C RL= 100kΩ VOUT = 200mVPP
VS= 1.8V CL= 20pF VCM = Vs/2
Figure 35. Open Loop Gain and Phase, 1.8V, 100kΩ Load
LPV801 LPV802 TG_Iq_Vs_VCMN.png
VCM = V- LPV802 RL=No Load
Figure 2. Supply Current vs. Supply Voltage, LPV802
LPV801 LPV802 TG_Vos_Vcm_3p3V.png
VS= 3.3V RL= 10MΩ
Figure 4. Typical Offset Voltage vs. Common Mode Voltage
LPV801 LPV802 Ib_vs_Temp.png
VS= 5V TA = -40 to 125 VCM = Vs/2
Figure 6. Input Bias Current vs. Temperature
LPV801 LPV802 IB_VCM_5V_m40.png
VS= 5V TA = -40°C
Figure 8. Input Bias Current vs. Common Mode Voltage
LPV801 LPV802 IB_VCM_5V_25C.png
VS= 5V TA = 25°C
Figure 10. Input Bias Current vs. Common Mode Voltage
LPV801 LPV802 IB_VCM_5V_125C.png
VS= 5V TA = 125°C
Figure 12. Input Bias Current vs. Common Mode Voltage
LPV801 LPV802 TG_Isnk_Vo_18V.png
VS= 1.8V RL= No Load
Figure 14. Output Swing vs. Sinking Current, 1.8V
LPV801 LPV802 TG_Isnk_Vo_3V.png
VS= 3.3V RL= No Load
Figure 16. Output Swing vs. Sinking Current, 3.3V
LPV801 LPV802 TG_Isnk_Vo_5V.png
VS= 5V RL= No Load
Figure 18. Output Swing vs. Sinking Current, 5V
LPV801 LPV802 TG_SSPULSE_5.png
TA = 25 RL= 10MΩ Vout = 200mVpp
VS= ±2.5V CL= 20pF AV = +1
Figure 20. Small Signal Pulse Response, 5V
LPV801 LPV802 TG_LSPULSE_5.png
TA = 25 RL= 10MΩ Vout = 2Vpp
VS= ±2.5V CL= 20pF AV = +1
Figure 22. Large Signal Pulse Response, 5V
LPV801 LPV802 PSRR_VS_FREQ.png
TA = 25 RL= 10MΩ ΔVS = 0.5Vpp
VS= 3.3V CL= 20p
VCM = Vs/2 AV = +1
Figure 24. ±PSRR vs Frequency
LPV801 LPV802 AVPH_3V_10M.png
TA = -40, 25, 125°C RL= 10MΩ VOUT = 200mVPP
VS= 3.3V CL= 20pF VCM = Vs/2
Figure 26. Open Loop Gain and Phase, 3.3V, 10 MΩ Load
LPV801 LPV802 AVPH_3V_1M.png
TA = -40, 25, 125°C RL= 1MΩ VOUT = 200mVPP
VS= 3.3V CL= 20pF VCM = Vs/2
Figure 28. Open Loop Gain and Phase, 3.3V, 1 MΩ Load
LPV801 LPV802 AVPH_3V_100k.png
TA = -40, 25, 125°C RL= 100kΩ VOUT = 200mVPP
VS= 3.3V CL= 20pF VCM = Vs/2
Figure 30. Open Loop Gain and Phase, 3.3V, 100kΩ Load
LPV801 LPV802 TG_Zout.png
TA = 25°C VS= 5 V RL= 10MΩ
Figure 32. Open Loop Output Impedance
LPV801 LPV802 Noise.png
TA = 25 RL= 1MΩ VCM = Vs/2
VS= 5V CL= 20pF AV = +1
Figure 34. Input Voltage Noise vs Frequency
LPV801 LPV802 EMIRR_3p3V.png
TA = 25 RL= 1MΩ VCM = Vs/2
VS= 3.3VCL= 20pF AV = +1
Figure 36. EMIRR Performance