SLOS712I January 2011  – October 2016 OPA2836 , OPA836

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. OPA836-Related Devices
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information: OPA836
    5. 7.5Thermal Information: OPA2836
    6. 7.6Electrical Characteristics: VS = 2.7 V
    7. 7.7Electrical Characteristics: VS = 5 V
    8. 7.8Typical Characteristics
      1. 7.8.1Typical Characteristics: VS = 2.7 V
      2. 7.8.2Typical Performance Graphs: VS = 5 V
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagrams
    3. 8.3Feature Description
      1. 8.3.1Input Common-Mode Voltage Range
      2. 8.3.2Output Voltage Range
      3. 8.3.3Power-Down Operation
      4. 8.3.4Low-Power Applications and the Effects of Resistor Values on Bandwidth
      5. 8.3.5Driving Capacitive Loads
    4. 8.4Device Functional Modes
      1. 8.4.1Split-Supply Operation (±1.25 V to ±2.75 V)
      2. 8.4.2Single-Supply Operation (2.5 V to 5.5 V)
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1 Noninverting Amplifier
      2. 9.1.2 Inverting Amplifier
      3. 9.1.3 Instrumentation Amplifier
      4. 9.1.4 Attenuators
      5. 9.1.5 Single-Ended-to-Differential Amplifier
      6. 9.1.6 Differential-to-Signal-Ended Amplifier
      7. 9.1.7 Differential-to-Differential Amplifier
      8. 9.1.8 Gain Setting With OPA836 RUN Integrated Resistors
      9. 9.1.9 Pulse Application With Single-Supply
      10. 9.1.10ADC Driver Performance
    2. 9.2Typical Applications
      1. 9.2.1Audio Frequency Performance
        1. 9.2.1.1Design Requirements
        2. 9.2.1.2Detailed Design Procedure
        3. 9.2.1.3Application Curves
      2. 9.2.2Active Filters
        1. 9.2.2.1Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Device Support
      1. 12.1.1Development Support
      2. 12.1.2Related Documentation
    2. 12.2Related Links
    3. 12.3Receiving Notification of Documentation Updates
    4. 12.4Community Resources
    5. 12.5Trademarks
    6. 12.6Electrostatic Discharge Caution
    7. 12.7Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
VS– to VS+Supply voltage5.5V
VIInput voltageVS– – 0.7 VS+ + 0.7V
VIDDifferential input voltage1V
IIContinuous input current0.85mA
IOContinuous output current60mA
Continuous power dissipationSee Thermal Information: OPA836
and
Thermal Information: OPA2836
TJMaximum junction temperature150°C
TAOperating free-air temperature–40125°C
TstgStorage temperature–65150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±6000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)±1000
Machine model±200
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MINNOMMAXUNIT
VS+Single supply voltage2.5 5 5.5 V
TA Ambient temperature–40 25 125 °C

Thermal Information: OPA836

THERMAL METRIC(1)OPA836UNIT
DBV (SOT23-6) RUN (WQFN-10)
6 PINS10 PINS
RθJAJunction-to-ambient thermal resistance194145.8°C/W
RθJC(top)Junction-to-case (top) thermal resistance 129.275.1°C/W
RθJBJunction-to-board thermal resistance 39.438.9°C/W
ψJTJunction-to-top characterization parameter 25.613.5°C/W
ψJBJunction-to-board characterization parameter 38.9104.5°C/W
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).

Thermal Information: OPA2836

THERMAL METRIC(1)OPA2836UNIT
D (SOIC-8) (DGS) VSSOP, MSOP-10 (RUN) WQFN-10 RMC (UQFN-10)
8 PINS10 PINS10 PINS10 PINS
RθJAJunction-to-ambient thermal resistance150.1206145.8 143.2°C/W
RθJCtopJunction-to-case (top) thermal resistance 83.875.375.1 49.0°C/W
RθJBJunction-to-board thermal resistance 68.496.238.9 61.9°C/W
ψJTJunction-to-top characterization parameter 33.012.913.5 3.3°C/W
ψJBJunction-to-board characterization parameter 67.994.6104.5 61.9°C/W
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).

Electrical Characteristics: VS = 2.7 V

at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNITTEST LEVEL(1)
AC PERFORMANCE
Small-signal bandwidthVOUT = 100 mVPP, G = 1200MHzC
VOUT = 100 mVPP, G = 2100
VOUT = 100 mVPP, G = 526
VOUT = 100 mVPP, G = 1011
Gain-bandwidth productVOUT = 100 mVPP, G = 10110MHzC
Large-signal bandwidthVOUT = 1 VPP, G = 260MHzC
Bandwidth for 0.1-dB flatnessVOUT = 1 VPP, G = 225MHzC
Slew rate, riseVOUT = 1 VSTEP, G = 2260V/µsC
Slew rate, fallVOUT = 1 VSTEP, G = 2240V/µsC
Rise timeVOUT = 1 VSTEP, G = 24nsC
Fall time VOUT = 1 VSTEP, G = 2 4.5nsC
Settling time to 1%, riseVOUT = 1 VSTEP, G = 215nsC
Settling time to 1%, fallVOUT = 1 VSTEP, G = 215nsC
Settling time to 0.1%, riseVOUT = 1 VSTEP, G = 230nsC
Settling time to 0.1%, fallVOUT = 1 VSTEP, G = 225nsC
Settling time to 0.01%, riseVOUT = 1 VSTEP, G = 250nsC
Settling time to 0.01%, fallVOUT = 1 VSTEP, G = 245nsC
Overshoot/UndershootVOUT = 1 VSTEP, G = 25%/3%C
Second-order harmonic distortionf = 10 kHz, VIN_CM = mid-supply – 0.5 V–133dBcC
f = 100 kHz, VIN_CM = mid-supply – 0.5 V–120C
f = 1 MHz, VIN_CM = mid-supply – 0.5 V–84C
Third-order harmonic distortionf = 10 kHz, VIN_CM = mid-supply – 0.5 V–137dBcC
f = 100 kHz, VIN_CM = mid-supply – 0.5 V–130C
f = 1 MHz, VIN_CM = mid-supply – 0.5 V–105C
Second-order intermodulation distortionf = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 1 VPP
VIN_CM = mid-supply – 0.5 V
–90dBcC
Third-order intermodulation distortionf = 1 MHz, 200-kHz Tone Spacing,
VOUT Envelope = 1 VPP
VIN_CM = mid-supply – 0.5 V
–90dBcC
Input voltage noisef = 100 KHz4.6nV/√HzC
Voltage noise 1/f corner frequency215HzC
Input current noisef = 1 MHz0.75pA/√HzC
AC PERFORMANCE (continued)
Current noise 1/f corner frequency31.7kHzC
Overdrive recovery time, over/underOverdrive = 0.5 V55/60nsC
Closed-loop output impedancef = 100 kHz0.02ΩC
Channel-to-channel crosstalk (OPA2836)f = 10 kHz –120dBC
DC PERFORMANCE
Open-loop voltage gain (AOL)100125dBA
Input referred offset voltageTA = 25°C–400±65400µVA
TA = 0°C to 70°C–680680B
TA = –40°C to 85°C–760760
TA = –40°C to 125°C–10601060
Input offset voltage drift(2)TA = 0°C to 70°C–6.2±16.2µV/°CB
TA = –40°C to 85°C–6±16
TA = –40°C to 125°C–6.6±1.16.6
Input bias current(3)TA = 25°C3006501000nAA
TA = 0°C to 70°C1901400B
TA = –40°C to 85°C1201500
TA = –40°C to 125°C1201800
Input bias current drift(2)TA = 0°C to 70°C–2±0.332nA/°CB
TA = –40°C to 85°C–1.9±0.321.9
TA = –40°C to 125°C–2.1±0.372.1
Input offset currentTA = 25°C–180±30180nAA
TA = 0°C to 70°C–200±30200B
TA = –40°C to 85°C–215±30215
TA = –40°C to 125°C–240±30240
Input offset current drift(2)TA = 0°C to 70°C–460±77460pA/°CB
TA = –40°C to 85°C–575±95575
TA = –40°C to 125°C–600±100600
INPUT
Common-mode input range lowTA = 25°C,
< 3-dB degradation in CMRR limit
–0.20VA
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
–0.20 VB
Common-mode input range highTA = 25°C,
< 3-dB degradation in CMRR limit
1.51.6VA
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
1.51.6VB
Input operating voltage rangeTA = 25°C,
< 6-dB degradation in THD
–0.3 to 1.75VC
Common-mode rejection ratio91114dBA
Input impedance common-mode200 || 1.2kΩ || pFC
Input impedance differential mode200 || 1kΩ || pFC
OUTPUT
Output voltage lowTA = 25°C, G = 50.150.2VA
TA = –40°C to 125°C, G = 50.150.2VB
Output voltage highTA = 25°C, G = 52.452.5VA
TA = –40°C to 125°C, G = 52.452.5VB
Output saturation voltage, high/lowTA = 25°C, G = 580/40mVC
Output current driveTA = 25°C±40±45mAA
TA = –40°C to 125°C±40±45mAB
GAIN SETTING RESISTORS (OPA836IRUN ONLY)
Resistor FB1 to FB2DC resistance158416001616ΩA
Resistor FB2 to FB3DC resistance118812001212ΩA
Resistor FB3 to FB4DC resistance396400404ΩA
Resistor toleranceDC resistance–1%1%A
Resistor temperature coefficientDC resistance <10PPMC
POWER SUPPLY
Specified operating voltage2.55.5VB
Quiescent operating current per amplifier TA = 25°C 0.70.951.15mAA
TA = –40°C to 125°C0.61.4mAB
Power supply rejection (±PSRR)91108dBA
POWER DOWN
Enable voltage thresholdSpecified "on" above VS– + 2.1 V2.1VA
Disable voltage thresholdSpecified "off" below VS– + 0.7 V0.7VA
Power-down pin bias currentPD = 0.5 V 20500nAA
Power-down quiescent currentPD = 0. 5 V 0.51.5µAA
Turnon time delayTime from PD = high to VOUT = 90% of final value200nsC
Turnoff time delayTime from PD = low to VOUT = 10% of original value25nsC
Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range.
Current is considered positive out of the pin.

Electrical Characteristics: VS = 5 V

at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply. TA = 25°C, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNITTEST LEVEL(1)
AC PERFORMANCE
Small-signal bandwidthVOUT = 100 mVPP, G = 1205MHzC
VOUT = 100 mVPP, G = 2100
VOUT = 100 mVPP, G = 528
VOUT = 100 mVPP, G = 1011.8
Gain-bandwidth productVOUT = 100 mVPP, G = 10118MHzC
Large-signal bandwidthVOUT = 2 VPP, G = 287MHzC
Bandwidth for 0.1-dB flatnessVOUT = 2 VPP, G = 229MHzC
Slew rate, riseVOUT = 2-V Step, G = 2560V/µsC
Slew rate, fallVOUT = 2-V Step, G = 2580V/µsC
Rise timeVOUT = 2-V Step, G = 23nsC
Fall timeVOUT = 2-V Step, G = 23nsC
AC PERFORMANCE (continued)
Settling time to 1%, riseVOUT = 2-V Step, G = 222nsC
Settling time to 1%, fallVOUT = 2-V Step, G = 222nsC
Settling time to 0.1%, riseVOUT = 2-V Step, G = 230nsC
Settling time to 0.1%, fallVOUT = 2-V Step, G = 230nsC
Settling time to 0.01%, riseVOUT = 2-V Step, G = 240nsC
Settling time to 0.01%, fallVOUT = 2-V Step, G = 245nsC
Overshoot/UndershootVOUT = 2-V Step, G = 27.5%/5%C
Second-order harmonic distortionf = 10 kHz–133dBcC
f = 100 kHz–120
f = 1 MHz–85
Third-order harmonic distortionf = 10 kHz–140dBcC
f = 100 kHz–130
f = 1 MHz–105
Second-order intermodulation distortionf = 1 MHz, 200 kHz Tone Spacing,
VOUT Envelope = 2 VPP
–79dBcC
Third-order intermodulation distortionf = 1 MHz, 200 kHz Tone Spacing,
VOUT Envelope = 2 VPP
–91dBcC
Signal-to-noise ratio, SNRf = 1 kHz, VOUT = 1 VRMS,
22 kHz bandwidth
0.00013%C
–117.6dBc
Total harmonic distortion, THDf = 1 kHz, VOUT = 1 VRMS0.00003%C
–130dBc
Input voltage noisef = 100 KHz4.6nV/√HzC
Voltage noise 1/f corner frequency215HzC
Input current noisef > 1 MHz0.75pA/√HzC
Current noise 1/f corner frequency31.7kHzC
Overdrive recovery time, over/underOverdrive = 0.5 V55/60nsC
Closed-loop output impedancef = 100 kHz0.02ΩC
Channel to channel crosstalk (OPA2836)f = 10 kHz –120dBC
DC PERFORMANCE
Open-loop voltage gain (AOL)100122dBA
Input referred offset voltageTA = 25°C–400±65400µVA
TA = 0°C to 70°C–685685B
TA = –40°C to 85°C–765765
TA = –40°C to 125°C–10801080
Input offset voltage drift(2)TA = 0°C to 70°C–6.3±1.056.3µV/°CB
TA = –40°C to 85°C–6.1±16.1
TA = –40°C to 125°C–6.8±1.16.8
Input bias current(3)TA = 25°C3006501000nAA
TA = 0°C to 70°C1901400B
TA = –40°C to 85°C1201550
TA = –40°C to 125°C1201850
Input bias current drift(2)TA = 0°C to 70°C±0.34±2nA/°CB
TA = –40°C to 85°C±0.34±2
TA = –40°C to 125°C±0.38±2.3
DC PERFORMANCE (continued)
Input offset currentTA = 25°C±30±180nAA
TA = 0°C to 70°C±30±200B
TA = –40°C to 85°C±30±215
TA = –40°C to 125°C±30±250
Input offset current drift(2)TA = 0°C to 70°C±80±480pA/°CB
TA = –40°C to 85°C±100±600
TA = –40°C to 125°C±110±660
INPUT
Common-mode input range lowTA = 25°C,
< 3-dB degradation in CMRR limit
–0.20VA
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
–0.20VB
Common-mode input range highTA = 25°C,
< 3-dB degradation in CMRR limit
3.83.9VA
TA = –40°C to 125°C,
< 3-dB degradation in CMRR limit
3.83.9VB
Input linear operating voltage rangeTA = 25°C,
< 6-dB degradation in THD
–0.3 to 4.05VC
Common-mode rejection ratio94116dBA
Input impedance common mode200 || 1.2kΩ || pFC
Input impedance differential mode200 || 1kΩ || pFC
OUTPUT
Output voltage lowTA = 25°C, G = 50.150.2VA
TA = –40°C to 125°C, G = 50.150.2VB
Output voltage highTA = 25°C, G = 54.754.8VA
TA = –40°C to 125°C, G = 54.754.8VB
Output saturation voltage, high/lowTA = 25°C, G = 5100/50mVC
Output current driveTA = 25°C±40±50mAA
TA = –40°C to 125°C±40±50mAB
GAIN SETTING RESISTORS (OPA836IRUN ONLY)
Resistor FB1 to FB2DC resistance158416001616ΩA
Resistor FB2 to FB3DC resistance118812001212ΩA
Resistor FB3 to FB4DC resistance396400404ΩA
Resistor toleranceDC resistance–11%A
Resistor temperature coefficientDC resistance <10PPMC
POWER SUPPLY
Specified operating voltage2.55.5VB
Quiescent operating current per amplifier TA = 25°C 0.81.01.2mAA
TA = –40°C to 125°C0.651.5mAB
Power supply rejection (±PSRR)94108dBA
POWER DOWN
Enable voltage thresholdSpecified "on" above VS–+ 2.1 V2.1VA
Disable voltage thresholdSpecified "off" below VS–+ 0.7 V0.7VA
Power-down pin bias currentPD = 0.5 V 20500nAA
Power-down quiescent currentPD = 0.5 V 0.51.5µAA
Turnon time delayTime from PD = high to VOUT = 90% of final value170nsC
Turnoff time delayTime from PD = low to VOUT = 10% of original value35nsC
Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range.
Current is considered positive out of the pin.

Typical Characteristics

Typical Characteristics: VS = 2.7 V

Table 1. Table of Graphs

FIGURE TITLEFIGURE LOCATION
Small Signal Frequency ResponseFigure 1
Large Signal Frequency ResponseFigure 2
Noninverting Pulse ResponseFigure 3
Inverting Pulse ResponseFigure 4
Slew Ratevs Output Voltage StepFigure 5
Output Overdrive RecoveryFigure 6
Harmonic Distortionvs FrequencyFigure 7
Harmonic Distortionvs Load ResistanceFigure 8
Harmonic Distortionvs Output VoltageFigure 9
Harmonic Distortionvs GainFigure 10
Output Voltage Swingvs Load ResistanceFigure 11
Output Saturation Voltagevs Load CurrentFigure 12
Output Impedancevs FrequencyFigure 13
Frequency Response With Capacitive LoadFigure 14
Series Output Resistorvs Capacitive Load Figure 17
Input Referred Noisevs FrequencyFigure 16
Open Loop Gainvs FrequencyFigure 15
Common Mode/Power Supply Rejection Ratiosvs FrequencyFigure 18
Crosstalkvs FrequencyFigure 19
Power Down ResponseFigure 20
Input Offset VoltageFigure 23
Input Offset Voltagevs Free-Air TemperatureFigure 21
Input Offset Voltage DriftFigure 48
Input Offset CurrentFigure 24
Input Offset Current vs Free-Air TemperatureFigure 25
Input Offset Current DriftFigure 26

at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 Vpp, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 gain_f_los712.gif
Figure 1. Small Signal Frequency Response
OPA836 OPA2836 vo_t_los712.gif
Figure 3. Noninverting Pulse Response
OPA836 OPA2836 SR_VS_los712.gif
Figure 5. Slew Rate vs Output Voltage Step
OPA836 OPA2836 lg_gain_f_los712.gif
Figure 2. Large Signal Frequency Response
OPA836 OPA2836 vo2_t_los712.gif
Figure 4. Inverting Pulse Response
OPA836 OPA2836 vi_vo_t_los712.gif
Figure 6. Output Overdrive Recovery

at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 Vpp, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 tcA15_27v_los712.gif
Figure 7. Harmonic Distortion vs Frequency
OPA836 OPA2836 tcA13_27v_los712.gif
Figure 9. Harmonic Distortion vs Output Voltage
OPA836 OPA2836 vo_rl_los712.gif
Figure 11. Output Voltage Swing vs Load Resistance
OPA836 OPA2836 tcA14_27v_los712.gif
Figure 8. Harmonic Distortion vs Load Resistance
OPA836 OPA2836 tcA2_27v_los712.gif
Figure 10. Harmonic Distortion vs Gain
OPA836 OPA2836 vsat_IL_los712.gif
Figure 12. Output Saturation Voltage vs Load Current

at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 Vpp, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 zo_f_los712.gif
Figure 13. Output Impedance vs Frequency
OPA836 OPA2836 C001_SLOS712.png
VS = 2.7 V
Figure 15. Open Loop Gain vs Frequency
OPA836 OPA2836 tcA1_27v_los712.gif
Figure 17. Series Output Resistor vs Capacitive Load
OPA836 OPA2836 load_g_f_los712.gif
Figure 14. Frequency Response With Capacitive Load
OPA836 OPA2836 D002_SLOS712.gif
VS = 2.7 V
Figure 16. Input Referred Noise vs Frequency
OPA836 OPA2836 tcA12_27v_los712.gif
Figure 18. Common Mode/Power Supply Rejection Ratios vs Frequency

at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 Vpp, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 OPA2836IDGS_Xtalk_LOS712.gif
Figure 19. Crosstalk vs Frequency
OPA836 OPA2836 tcA4_27v_los712.gif
Figure 21. Input Offset Voltage vs Free-Air Temperature
OPA836 OPA2836 tcA3_27v_los712.gif
Figure 23. Input Offset Voltage
OPA836 OPA2836 pwr_dwn_los712.gif
Figure 20. Power Down Response
OPA836 OPA2836 tcA5_27v_los712.gif
Figure 22. Input Offset Voltage Drift
OPA836 OPA2836 tcA6_27v_los712.gif
Figure 24. Input Offset Current

at VS+ = +2.7 V, VS– = 0 V, VOUT = 1 Vpp, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 tcA7_27v_los712.gif
Figure 25. Input Offset Current vs Free-Air Temperature
OPA836 OPA2836 tcA8_27v_los712.gif
Figure 26. Input Offset Current Drift

Typical Performance Graphs: VS = 5 V

Table 2. Table of Graphs

FIGURE TITLEFIGURE LOCATION
Small Signal Frequency ResponseFigure 27
Large Signal Frequency ResponseFigure 28
Noninverting Pulse ResponseFigure 29
Inverting Pulse ResponseFigure 30
Slew Ratevs Output Voltage StepFigure 31
Output Overdrive RecoveryFigure 32
Harmonic Distortionvs FrequencyFigure 33
Harmonic Distortionvs Load ResistanceFigure 34
Harmonic Distortionvs Output VoltageFigure 35
Harmonic Distortionvs GainFigure 36
Output Voltage Swingvs Load ResistanceFigure 37
Output Saturation Voltagevs Load CurrentFigure 38
Output Impedancevs FrequencyFigure 39
Frequency Response With Capacitive LoadFigure 40
Series Output Resistorvs Capacitive Load Figure 43
Input Referred Noisevs FrequencyFigure 41
Open Loop Gainvs FrequencyFigure 42
Common Mode/Power Supply Rejection Ratiosvs FrequencyFigure 44
Crosstalkvs FrequencyFigure 45
Power Down ResponseFigure 46
Input Offset VoltageFigure 49
Input Offset Voltagevs Free-Air TemperatureFigure 47
Input Offset Voltage DriftFigure 48
Input Offset CurrentFigure 50
Input Offset Current vs Free-Air TemperatureFigure 51
Input Offset Current DriftFigure 52

at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply unless otherwise noted. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 gainB_f_los712.gif
Figure 27. Small Signal Frequency Response
OPA836 OPA2836 voB_t_los712.gif
Figure 29. Noninverting Pulse Response
OPA836 OPA2836 SRB_VS_los712.gif
Figure 31. Slew Rate vs Output Voltage Step
OPA836 OPA2836 lgB_gain_f_los712.gif
Figure 28. Large Signal Frequency Response
OPA836 OPA2836 vo2B_t_los712.gif
Figure 30. Inverting Pulse Response
OPA836 OPA2836 viB_vo_t_los712.gif
Figure 32. Output Overdrive Recovery

at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply unless otherwise noted. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 tcB13_5v_los712.gif
Figure 33. Harmonic Distortion vs Frequency
OPA836 OPA2836 tcB14_5v_los712.gif
Figure 35. Harmonic Distortion vs Output Voltage
OPA836 OPA2836 voB_rl_los712.gif
Figure 37. Output Voltage Swing vs Load Resistance
OPA836 OPA2836 tcB15_5v_los712.gif
Figure 34. Harmonic Distortion vs Load Resistance
OPA836 OPA2836 tcB2_5v_los712.gif
Figure 36. Harmonic Distortion vs Gain
OPA836 OPA2836 vsatB_IL_los712.gif
Figure 38. Output Saturation Voltage vs Load Current

at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply unless otherwise noted. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 zoB_f_los712.gif
Figure 39. Output Impedance vs Frequency
OPA836 OPA2836 C002_SLOS712.png
VS = 5.0 V
Figure 41. Open Loop Gain vs Frequency
OPA836 OPA2836 tcB1_5v_los712.gif
Figure 43. Series Output Resistor vs Capacitive Load
OPA836 OPA2836 loadB_g_f_los712.gif
Figure 40. Frequency Response With Capacitive Load
OPA836 OPA2836 D004_SLOS712.gif
VS = 5.0 V
Figure 42. Input Referred Noise vs Frequency
OPA836 OPA2836 tcB12_5v_los712.gif
Figure 44. Common-Mode/Power Supply Rejection Ratios vs Frequency

at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply unless otherwise noted. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 OPA2836IDGS_Xtalk_LOS712.gif
Figure 45. Crosstalk vs Frequency
OPA836 OPA2836 tcB4_5v_los712.gif
Figure 47. Input Offset Voltage vs Free-Air Temperature
OPA836 OPA2836 tcB3_5v_los712.gif
Figure 49. Input Offset Voltage
OPA836 OPA2836 pwrB_dwn_los712.gif
Figure 46. Power Down Response
OPA836 OPA2836 tcB5_5v_los712.gif
Figure 48. Input Offset Voltage Drift
OPA836 OPA2836 tcB6_5v_los712.gif
Figure 50. Input Offset Current

at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 1 kΩ, G = 1 V/V, input and output referenced to mid-supply unless otherwise noted. TA = 25°C, unless otherwise noted.

OPA836 OPA2836 tcB7_5v_los712.gif
Figure 51. Input Offset Current vs Free-Air Temperature
OPA836 OPA2836 tcB8_5v_los712.gif
Figure 52. Input Offset Current Drift