SLOS073G March   1976  – November 2014 RC4558

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Operating Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Unity-Gain Bandwidth
      2. 7.3.2 Common-Mode Rejection Ratio
      3. 7.3.3 Slew Rate
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
        1. 8.1.2.1 Amplifier Selection
        2. 8.1.2.2 Passive Component Selection
      3. 8.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • DGK|8
  • PS|8
  • PW|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Typical Application

Some applications require differential signals. Figure 14 shows a simple circuit to convert a single-ended input of 2 V to 10 V into differential output of ±8 V on a single 15-V supply. The output range is intentionally limited to maximize linearity. The circuit is composed of two amplifiers. One amplifier acts as a buffer and creates a voltage, VOUT+. The second amplifier inverts the input and adds a reference voltage to generate VOUT–. Both VOUT+ and VOUT– range from 2 V to 10 V. The difference, VDIFF, is the difference between VOUT+ and VOUT–.

app_sch.gifFigure 14. Schematic for Single-Ended Input to Differential Output Conversion

8.1.1 Design Requirements

The design requirements are as follows:

  • Supply voltage: 15 V
  • Reference voltage: 12V
  • Input: 2 V to 10 V
  • Output differential: ±8 V

8.1.2 Detailed Design Procedure

The circuit in Figure 14 takes a single-ended input signal, VIN, and generates two output signals, VOUT+ and VOUT– using two amplifiers and a reference voltage, VREF. VOUT+ is the output of the first amplifier and is a buffered version of the input signal, VIN (see Equation 1). VOUT– is the output of the second amplifier which uses VREF to add an offset voltage to VIN and feedback to add inverting gain. The transfer function for VOUT– is Equation 2.

Equation 1. VOUT+ = VIN
Equation 2. Eq2_SBOS703.gif

The differential output signal, VDIFF, is the difference between the two single-ended output signals, VOUT+ and VOUT–. Equation 3 shows the transfer function for VDIFF. By applying the conditions that R1 = R2 and R3 = R4, the transfer function is simplified into Equation 6. Using this configuration, the maximum input signal is equal to the reference voltage and the maximum output of each amplifier is equal to the VREF. The differential output range is 2×VREF. Furthermore, the common mode voltage will be one half of VREF (see Equation 7).

Equation 3. eq_05_sbos703.gif
Equation 4. VOUT+ = VIN
Equation 5. VOUT– = VREF – VIN
Equation 6. VDIFF = 2×VIN – VREF
Equation 7. eq_06_sbos703.gif

8.1.2.1 Amplifier Selection

Linearity over the input range is key for good dc accuracy. The common mode input range and the output swing limitations determine the linearity. In general, an amplifier with rail-to-rail input and output swing is required. Bandwidth is a key concern for this design. Because RC4558 has a bandwidth of 3 MHz, this circuit will only be able to process signals with frequencies of less than 3 MHz.

8.1.2.2 Passive Component Selection

Because the transfer function of VOUT– is heavily reliant on resistors (R1, R2, R3, and R4), use resistors with low tolerances to maximize performance and minimize error. This design used resistors with resistance values of
36 kΩ with tolerances measured to be within 2%. But, if the noise of the system is a key parameter, the user can select smaller resistance values (6 kΩ or lower) to keep the overall system noise low. This ensures that the noise from the resistors is lower than the amplifier noise.

8.1.3 Application Curves

The measured transfer functions in Figure 15, Figure 16, and Figure 17 were generated by sweeping the input voltage from 0 V to 12 V. However, this design should only be used between 2 V and 10 V for optimum linearity.

C003_SLOS073.pngFigure 15. Differential Output Voltage Node vs Input Voltage
C002_SLOS073.pngFigure 17. Positive Output Voltage Node vs Input Voltage
C001_SLOS073.pngFigure 16. Positive Output Voltage Node vs Input Voltage