SNVS697E January   2011  – December 2016 SM72485

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Circuit Overview
      2. 7.3.2 Current Limit
      3. 7.3.3 N-Channel Buck Switch and Driver
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Start-Up Regulator (VCC)
      2. 7.4.2 Regulation Comparator
      3. 7.4.3 Overvoltage Comparator
      4. 7.4.4 ON-Time Generator and Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selection of External Components
          1. 8.2.2.1.1  RFB1 and RFB2
          2. 8.2.2.1.2  Fs and RT
          3. 8.2.2.1.3  L1
          4. 8.2.2.1.4  C3
          5. 8.2.2.1.5  C2 and R3
          6. 8.2.2.1.6  ESR and R3
          7. 8.2.2.1.7  RCL
          8. 8.2.2.1.8  D1
          9. 8.2.2.1.9  C1
          10. 8.2.2.1.10 C4
          11. 8.2.2.1.11 C5
        2. 8.2.2.2 Low Output Ripple Configurations
          1. 8.2.2.2.1 Reduced Ripple Configuration
          2. 8.2.2.2.2 Minimum Ripple Configuration
          3. 8.2.2.2.3 Alternate Minimum Ripple Configuration
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Description

Overview

The SM72485 step-down switching regulator features all the functions required to implement a low-cost, efficient, buck-bias power converter. This high-voltage regulator contains a 100-V, N-channel buck switch that is easy to implement and is provided in the VSSOP and the thermally enhanced WSON package. The regulator is based on a control scheme using an on-time inversely proportional to VIN. The control scheme requires no loop compensation. Current limit is implemented with forced off-time, which is inversely proportional to VOUT. This scheme ensures short-circuit control while providing minimum foldback.

The SM72485 can be applied in numerous applications to efficiently regulate down higher voltages. This regulator is well suited for high voltage PV panel junction boxes, 48-V telecom and the new 42-V automotive power bus ranges. Features include: thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, maximum duty cycle limit timer, intelligent current limit off-timer, and a precharge switch.

Functional Block Diagram

SM72485 30142310.gif

Feature Description

Control Circuit Overview

The SM72485 is a buck DC-DC regulator that uses a control scheme in which the on-time varies inversely with line voltage (VIN). Control is based on a comparator and the on-time one-shot, with the output voltage feedback (FB) compared to an internal reference (2.5 V). If the FB level is below the reference the buck switch is turned on for a fixed time determined by the line voltage and a programming resistor (RT). Following the ON period, the switch remains off for at least the minimum off-timer period of 300 ns. If FB is still below the reference at that time, the switch turns on again for another on-time period. This continues until regulation is achieved.

The SM72485 operates in discontinuous conduction mode at light load currents, and continuous conduction mode at heavy load current. In discontinuous conduction mode, current through the output inductor starts at zero and ramps up to a peak during the on-time, then ramps back to zero before the end of the off-time. The next on-time period starts when the voltage at FB falls below the internal reference, until then the inductor current remains zero. In this mode the operating frequency is lower than in continuous conduction mode, and varies with load current. Therefore at light loads the conversion efficiency is maintained, because the switching losses reduce with the reduction in load and frequency. The discontinuous operating frequency can be calculated in Equation 1.

Equation 1. SM72485 30142311.gif

where

  • RL = the load resistance

In continuous conduction mode, current flows continuously through the inductor and never ramps down to zero. In this mode the operating frequency is greater than the discontinuous mode frequency and remains relatively constant with load and line variations. The approximate continuous mode operating frequency can be calculated in Equation 2.

Equation 2. SM72485 30142312.gif

The output voltage (VOUT) is programmed by two external resistors as shown in the Functional Block Diagram. The regulation point can be calculated in Equation 3.

Equation 3. VOUT = 2.5 × (RFB1 + RFB2) / RFB1

The SM72485 regulates the output voltage based on ripple voltage at the feedback input, requiring a minimum amount of ESR for the output capacitor C2. A minimum of 25 mV to 50 mV of ripple voltage at the feedback pin (FB) is required for the SM72485. In cases where the capacitor ESR is too small, additional series resistance may be required (R3 in the block diagram).

For applications where lower output voltage ripple is required the output can be taken directly from a low-ESR output capacitor, as shown in Figure 7. However, R3 slightly degrades the load regulation.

SM72485 30142313.gif Figure 7. Low Ripple Output Configuration

Current Limit

The SM72485 contains an intelligent current limit off-timer. If the current in the Buck switch exceeds 0.3 A, the present cycle is immediately terminated, and a non-resetable off-timer is initiated. The length of off-time is controlled by an external resistor (RCL) and the FB voltage (see Figure 4). When FB = 0 V, a maximum off-time is required, and the time is preset to 35 µs. This condition occurs when the output is shorted, and during the initial part of start-up. This amount of time ensures safe short-circuit operation up to the maximum input voltage of
95 V. In cases of overload where the FB voltage is above zero volts (not a short circuit) the current limit off-time is less than 35 µs. Reducing the off-time during less severe overloads reduces the amount of foldback, recovery time, and the start-up time. The off-time is calculated in Equation 4.

Equation 4. tOFF = 10–5 / (0.285 + (VFB / 6.35 × 10–6 × RCL))

The current-limit-sensing circuit is blanked for the first 50 ns to 70 ns of each on-time so it is not falsely tripped by the current surge which occurs at turnon. The current surge is required by the re-circulating diode (D1) for its turnoff recovery.

N-Channel Buck Switch and Driver

The SM72485 integrates an N-channel buck switch and associated floating high voltage gate driver. The gate driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.01-µF ceramic capacitor (C4) connected between the BST pin and SW pin provides the voltage to the driver during the on-time.

During each off-time, the SW pin is at approximately 0 V, and the bootstrap capacitor charges from VCC through the internal diode. The minimum off-timer, set to 300 ns, ensures a minimum time each cycle to recharge the bootstrap capacitor.

The internal precharge switch at the SW pin is turned on for ≊150 ns during the minimum off-time period, ensuring sufficient voltage exists across the bootstrap capacitor for the on-time. This feature helps prevent operating problems which can occur during very light load conditions, involving a long off-time, during which the voltage across the bootstrap capacitor could otherwise reduce below the gate drive UVLO threshold. The precharge switch also helps prevent start-up problems which can occur if the output voltage is precharged prior to turnon. After current limit detection, the precharge switch is turned on for the entire duration of the forced off-time.

Thermal Protection

The SM72485 must be operated so the junction temperature does not exceed 125°C during normal operation. An internal thermal shutdown circuit is provided to shutdown the SM72485 in the event of a higher than normal junction temperature. When activated, typically at 165°C, the controller is forced into a low power reset state by disabling the buck switch. This feature prevents catastrophic failures from accidental device overheating. When the junction temperature reduces below 140°C (typical hysteresis = 25°C) normal operation is resumed.

Device Functional Modes

Start-Up Regulator (VCC)

The high voltage bias regulator is integrated within the SM72485. The input pin (VIN) can be connected directly to line voltages between 6 V and 95 V, with transient capability to 100 V. Referring to the block diagram and the graph of VCC vs VIN, when VIN is between 6 V and the bypass threshold (nominally 8.5 V), the bypass switch (Q2) is on, and VCC tracks VIN within 100 mV to 150 mV. The bypass switch on-resistance is approximately 100 Ω, with inherent current limiting at approximately 100 mA. When VIN is above the bypass threshold Q2 is turned off, and VCC is regulated at 7 V. The VCC regulator output current is limited at approximately 9.2 mA. When the SM72485 is shutdown using the RT/SD pin, the VCC bypass switch is shut off regardless of the voltage at VIN.

When VIN exceeds the bypass threshold, the time required for Q2 to shut off is approximately 2 µs to 3 µs. The capacitor at VCC (C3) must be a minimum of 0.47 µF to prevent the voltage at VCC from rising above its absolute maximum rating in response to a step input applied at VIN. C3 must be placed as close as possible to the VCC and RTN pins. In applications with a relatively high input voltage, power dissipation in the bias regulator is a concern. An auxiliary voltage of between 7.5 V and 14 V can be diode connected to the VCC pin to shut off the VCC regulator, thereby reducing internal power dissipation. The current required into the VCC pin is shown in Figure 6. Internally a diode connects VCC to VIN requiring that the auxiliary voltage be less than VIN.

The turnon sequence is shown in Figure 8. During the initial delay (t1) VCC ramps up at a rate determined by its current limit and C3 while internal circuitry stabilizes. When VCC reaches the upper threshold of its undervoltage lockout (UVLO, typically 5.3 V) the buckswitch is enabled. The inductor current increases to the current limit threshold (ILIM) and during t2 VOUT increases as the output capacitor charges up. When VOUT reaches the intended voltage the average inductor current decreases (t3) to the nominal load current (IO).

SM72485 30142314.gif Figure 8. Start-Up Sequence

Regulation Comparator

The feedback voltage at FB is compared to an internal 2.5-V reference. In normal operation (the output voltage is regulated), an on-time period is initiated when the voltage at FB falls below 2.5 V. The buck switch remains on for the on-time, causing the FB voltage to rise above 2.5 V. After the on-time period, the buck switch remains off until the FB voltage again falls below 2.5 V. During start-up, the FB voltage is below 2.5 V at the end of each on-time, resulting in the minimum off-time of 300 ns. Bias current at the FB pin is nominally 100 nA.

Overvoltage Comparator

The feedback voltage at FB is compared to an internal 2.875-V reference. If the voltage at FB rises 2.875 V above the on-time pulse is immediately terminated. This condition can occur if the input voltage, or the output load, change suddenly. The buck switch does not turn on again until the voltage at FB falls below 2.5 V.

ON-Time Generator and Shutdown

The on-time for the SM72485 is determined by the RT resistor, and is inversely proportional to the input voltage (VIN), resulting in a nearly constant frequency as VIN is varied over its range. The on-time equation for the SM72485 is Equation 5.

Equation 5. tON = 1.385 × 10–10 × RT / VIN

RT must be selected for a minimum on-time (at maximum VIN) greater than 400 ns, for proper current limit operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT.

The SM72485 can be remotely disabled by taking the RT/SD pin to ground. See Figure 9. The voltage at the RT/SD pin is between 1.5 V and 3 V, depending on VIN and the value of the RT resistor.

SM72485 30142315.gif Figure 9. Shutdown Implementation