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SN54AC02-SP

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Space 4-ch, 2-input, 2-V to 6-V NOR gates

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Data sheet

SN54AC02-SP

ACTIVE
Data sheet Order now

Product details

Technology family AC Number of channels 4 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Output type Push-Pull Input type Standard CMOS Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Space Operating temperature range (°C) -55 to 125
Technology family AC Number of channels 4 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Output type Push-Pull Input type Standard CMOS Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Space Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3
  • AC Types Feature 1.5-V to 5.5-V Operation
  • Rad-Tolerant: 50 KRad(Si) TID(1)
    • TID Dose Rate < 2 mRad/sec
  • QML-V Qualified, SMD 5962-87612

(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contact factory for details.
  • AC Types Feature 1.5-V to 5.5-V Operation
  • Rad-Tolerant: 50 KRad(Si) TID(1)
    • TID Dose Rate < 2 mRad/sec
  • QML-V Qualified, SMD 5962-87612

(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contact factory for details.

The ’AC02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A • B or Y = A + B in positive logic.

The ’AC02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A • B or Y = A + B in positive logic.
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Technical documentation

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Type Title Date
* Data sheet Rad-Tolerant Class V, Quadruple 2-Input Positive-NOR Gates datasheet (Rev. A) 10 Dec 2008
* SMD SN54AC02-SP SMD 5962-87612 08 Jul 2016
* Radiation & reliability report SN54AC02-SP - 50 krad(Si) Total Ionizing Dose (TID) Characterization Report 26 Mar 2015
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 Aug 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Oct 2022
Selection guide TI Space Products (Rev. I) 03 Mar 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
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Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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CFP (W) 14 View options
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