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SN54HC273-DIE

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Octal D-Type Flip Flops With - Clear, SN54HC273-DIE

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Data sheet

SN54HC273-DIE

ACTIVE
Data sheet Order now

Product details

Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type CMOS Output type CMOS IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Operating temperature range (°C) 25 to 25 Rating Space
Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type CMOS Output type CMOS IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Operating temperature range (°C) 25 to 25 Rating Space
DIESALE (TD) — See data sheet
  • Wide Operating Voltage Range
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption
  • Typical tpd = 12 ns
  • Low Input Current
  • Contain Eight Flip-Flops With
    Single-Rail Outputs
  • Direct Clear Input
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators
  • Wide Operating Voltage Range
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption
  • Typical tpd = 12 ns
  • Low Input Current
  • Contain Eight Flip-Flops With
    Single-Rail Outputs
  • Direct Clear Input
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
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Technical documentation

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Type Title Date
* Data sheet Rad-Tolerant Space Grade Die, Quadruple 2-Input Positive-AND Gate, SN54HC273-DIE datasheet 03 Jun 2013
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Selection guide TI Space Products (Rev. I) 03 Mar 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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