Home Interface USB ICs USB redrivers & multiplexers

SN65EL11

ACTIVE

PECL/ECL 1:2 Fanout Buffer

Product details

Rating Catalog Operating temperature range (°C) -40 to 85
Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 1:2 PECL/ECL Fanout Buffer
  • Operating Range
    • PECL: VCC = 4.2 V to 5.7 V With VEE = 0 V
    • NECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
  • 5-ps Skew Between Outputs
  • Support for Clock Frequencies >2.5 GHz
  • 265-ps Typical Propagation Delay
  • Deterministic Output Value for Open Input Conditions
  • Drop-In Compatible With MC10EL11, MC100EL11
  • Built-In Input Pulldown Resistors
  • Built-In Temperature Compensation
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion
  • 1:2 PECL/ECL Fanout Buffer
  • Operating Range
    • PECL: VCC = 4.2 V to 5.7 V With VEE = 0 V
    • NECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
  • 5-ps Skew Between Outputs
  • Support for Clock Frequencies >2.5 GHz
  • 265-ps Typical Propagation Delay
  • Deterministic Output Value for Open Input Conditions
  • Drop-In Compatible With MC10EL11, MC100EL11
  • Built-In Input Pulldown Resistors
  • Built-In Temperature Compensation
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion

The SN65EL11 is a differential 1:2 PECL/ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in an open condition. The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.

The SN65EL11 is a differential 1:2 PECL/ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in an open condition. The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 2
Type Title Date
* Data sheet 5-V PECL/ECL 1:2 Fanout Buffer datasheet 26 Nov 2008
Application note AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) 17 Oct 2007

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

SN65EL11 IBIS Model Version 1.1

SLLM048.ZIP (15 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins Download
SOIC (D) 8 View options
VSSOP (DGK) 8 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos