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SN65ELT23

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5-V dual differential PECL buffer to TTL translator

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Data sheet

SN65ELT23

ACTIVE
Data sheet Order now

Product details

Function Receiver, Translator Protocols PECL Number of transmitters 0 Number of receivers 2 Supply voltage (V) 5 Signaling rate (MBits) 500 Input signal PECL Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver, Translator Protocols PECL Number of transmitters 0 Number of receivers 2 Supply voltage (V) 5 Signaling rate (MBits) 500 Input signal PECL Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Dual 5-V Differential PECL-to-TTL Buffer
  • 24-mA TTL Ouputs
  • Operating Range
    • PECL VCC = 4.75 V to 5.25 V with GND = 0 V
  • Support for Clock Frequencies of 250 MHz (TYP)
  • 3.5-ns Typical Propagation Delay
  • Output Default Low with Inputs Left Open or <1.3 V
  • Internal Input 50-k Pull-Down Resistor
  • Built-In Temperature Compensation
  • Drop-In Compatible to the MC100ELT23
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion for Clock or Data
  • Dual 5-V Differential PECL-to-TTL Buffer
  • 24-mA TTL Ouputs
  • Operating Range
    • PECL VCC = 4.75 V to 5.25 V with GND = 0 V
  • Support for Clock Frequencies of 250 MHz (TYP)
  • 3.5-ns Typical Propagation Delay
  • Output Default Low with Inputs Left Open or <1.3 V
  • Internal Input 50-k Pull-Down Resistor
  • Built-In Temperature Compensation
  • Drop-In Compatible to the MC100ELT23
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion for Clock or Data

The SN65ELT23 is a low power dual PECL-to-TTL translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.

The SN65ELT23 is a low power dual PECL-to-TTL translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
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* Data sheet 5-V Dual Differential PECL Buffer-to-TTL Translator datasheet 30 Jun 2009
Application note AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) 17 Oct 2007

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