SN65LVDM1676 16-channel LVDM transceiver | TI.com

SN65LVDM1676 (ACTIVE) 16-channel LVDM transceiver

16-channel LVDM transceiver - SN65LVDM1676
Datasheet
 

Description

The SN65LVDM1676 and SN65LVDM1677 (integrated termination) are sixteen differential line transmitters or receivers (tranceivers) that use low-voltage differential signaling (LVDS) to achieve signaling rates up to 200 Mbps per transceiver configured as a receiver and up to 650 Mbps per transceiver configured as a transmitter. These products are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers are doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50- load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of 100 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The large number of transceivers integrated into the same substrate along with the low pulse skew of balanced signaling, allows extremely precise timing alignment of clock and data for synchronous parallel data transfers. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)

The SN65LVDM1676 and SN65LVDM1677 are characterized for operation from -40°C to 85°C.

Features

  • Sixteen Low-Voltage Differential Transceivers. Designed for Signaling Rates up to 200 Mbps per Receiver or 650 Mbps per Transmitter.
  • Simplex (Point-to-Point) or Half-Duplex (Multipoint) Interface
  • Typical Differential Output Voltage of 340 mV Into a 50- Line Termination on 'LVDM1677 Product
  • Propagation Delay Time:
    • Driver: 2.5 ns Typ
    • Receiver: 3 ns Typ
  • Driver is High Impedance When Disabled or With VCC < 1.5 V for Power Up/Down Glitch-Free Performance and Hot-Plugging Events
  • Bus-Terminal ESD Protection Exceeds 12 kV
  • Low-Voltage TTL (LVTTL) Logic Input Levels Are 5-V Tolerant
  • Packaged in Thin Shrink Small-Outline Package With 20 mil Terminal Pitch

WEBENCH® Designer SN65LVDM1676

Tx:
Mid Channel:
Rx:
Max Data Rate:  Gbps

 
Number of UI:
PRBS:
 
Eye Diagram

Parametrics

Compare all products in LVDS, M-LVDS & PECL Email Download to Excel
Part number Order Function Protocols Number of Tx Number of Rx Signaling rate (Mbps) Input signal Output signal Package Group Operating temperature range (C) Rating
SN65LVDM1676 Order now Transceiver     M-LVDS     16     16     200     LVDM
LVTTL    
LVDM
LVTTL    
TSSOP | 64     -40 to 85     Catalog    
SN65LVDM1677 Samples not available Transceiver     M-LVDS     16     16     200     LVDM
LVTTL    
LVDM
LVTTL    
TSSOP | 64     -40 to 85     Catalog    
SN65MLVD080 Order now Transceiver     M-LVDS     8     8     250     LVTTL
M-LVDS    
M-LVDS
LVTTL    
TSSOP | 64     -40 to 85     Catalog    
SN65MLVD082 Order now Transceiver     M-LVDS     8     8     250     LVTTL
M-LVDS    
M-LVDS
LVTTL    
TSSOP | 64     -40 to 85     Catalog