SN65LVDS116

ACTIVE

1:16 LVDS clock fanout buffer

Product details

Function Receiver, Repeater Protocols LVDS Number of transmitters 16 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVDS Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver, Repeater Protocols LVDS Number of transmitters 16 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVDS Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 64 137.7 mm² 17 x 8.1
  • One Receiver and Sixteen Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
  • Typical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHz
  • Enabling Logic Allows Separate Control of Each Bank of Four Channels or 2-Bit Selection of Any One of the Four Banks
  • Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-
  • One Receiver and Sixteen Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
  • Typical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHz
  • Enabling Logic Allows Separate Control of Each Bank of Four Channels or 2-Bit Selection of Any One of the Four Banks
  • Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-
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* Data sheet 16-Port LVDS Repeater datasheet (Rev. D) 02 Feb 2005

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SN65LVDS116 IBIS Model

SLLC029.ZIP (5 KB) - IBIS Model
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TSSOP (DGG) 64 View options

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