SN65LVDS9637 Dual LVDS Receiver | TI.com

SN65LVDS9637 (ACTIVE) Dual LVDS Receiver

 

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Description

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.

Features

  • Meet or Exceed the Requirements of ANSI
    TIA/EIA-644 Standard
  • Operate With a Single 3.3-V Supply
  • Designed for Signaling Rates of up to
    150 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Typical Propagation Delay Time of 2.1 ns
  • Power Dissipation 60 mW Typical Per
    Receiver at Maximum Data Rate
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Output
    Levels
  • Pin Compatible With AM26LS32, MC3486,
    and µA9637
  • Open-Circuit Fail-Safe
  • Cold Sparing for Space and High-Reliability
    Applications Requiring Redundancy

Parametrics

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Part number Order Device type Protocols Number of Tx Number of Rx Input signal Output signal Signaling rate (Mbps) ESD HBM (kV) Operating temperature range (C) Package Group Package size: mm2:W x L (PKG)
SN65LVDS9637 Order now Receiver     LVDS     0     2     LVDS     LVTTL     150     8     -40 to 85     MSOP-PowerPAD | 8
SOIC | 8
VSSOP | 8    
8MSOP-PowerPAD: 15 mm2: 4.9 x 3 (MSOP-PowerPAD | 8)
8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)
8VSSOP: 15 mm2: 4.9 x 3 (VSSOP | 8)    
SN65LVDS32 Order now Receiver     LVDS     0     4     LVDS     LVTTL     100     8     -40 to 85     SOIC | 16
SO | 16
TSSOP | 16    
16SO: 80 mm2: 7.8 x 10.2 (SO | 16)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)
16TSSOP: 22 mm2: 4.4 x 5 (TSSOP | 16)    
SN65LVDS34 Order now Receiver     LVDS     0     4     ECL
LVPECL
PECL    
LVTTL     400     15     -40 to 85     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)    
SN65LVDS3486 Samples not available Receiver     LVDS     0     4     LVDS     LVTTL     100     8     -40 to 85     SOIC | 16     16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)    
SN65LVDS9637B Order now Receiver     LVDS     0     2     LVDS     LVTTL     400     15     -40 to 85     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)    
SN65LVDS9638 Order now Driver     LVDS     2     0     LVTTL     LVDS     1500     8     -40 to 85     MSOP-PowerPAD | 8
SOIC | 8
VSSOP | 8    
8MSOP-PowerPAD: 15 mm2: 4.9 x 3 (MSOP-PowerPAD | 8)
8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)
8VSSOP: 15 mm2: 4.9 x 3 (VSSOP | 8)    
SN65LVDT9637B Samples not available Receiver     LVDS     0     2     LVDS     LVTTL     400     15     -40 to 85     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)    
SN75LVDS9637 Samples not available Receiver     LVDS     0     2     LVDS     LVTTL     155     8     0 to 70     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)    
SN75LVDS9638 Samples not available Driver     LVDS