SN74AC74-EP Enhanced Product Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset | TI.com

SN74AC74-EP
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Enhanced Product Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset

Enhanced Product Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset - SN74AC74-EP
Datasheet
 

Description

The SN74AC74 is a dual positive-edge-triggered D-type flip-flop.

A low level at the preset (PRE)\ or clear (CLR)\ input sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at D can be changed without affecting the levels at the outputs.

Features

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 10 ns at 5 V

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Parametrics

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Part number Order Technology Family Input type Output type VCC (Min) (V) VCC (Max) (V) Channels (#) Clock Frequency (Max) (MHz) ICC (uA) IOL (Max) (mA) IOH (Max) (mA) Features Rating Package Group
SN74AC74-EP Order now AC     Standard CMOS     Push-Pull     2     6     2     100     40     24     -24     Balanced outputs
High speed (tpd 10-50ns)
Positive input clamp diode    
HiRel Enhanced Product     SOIC | 14