Product details

Technology family AHC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 8 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating Catalog Operating temperature range (°C) -55 to 125
Technology family AHC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 8 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating Catalog Operating temperature range (°C) -55 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Operating range from 2V to 5.5V
  • Low power consumption, 10µA maximum ICC
  • Maximum tpd of 6ns at 5V
  • ±8mA output drive at 5V
  • Latch-up performance exceeds 250mAper JESD 17
  • Operating range from 2V to 5.5V
  • Low power consumption, 10µA maximum ICC
  • Maximum tpd of 6ns at 5V
  • ±8mA output drive at 5V
  • Latch-up performance exceeds 250mAper JESD 17

The SN74AHC1G09 is a single 2-input positive-AND gate with an open drain output configuration. The device performs the Boolean logic Y = A × B in positive logic.

The SN74AHC1G09 is a single 2-input positive-AND gate with an open drain output configuration. The device performs the Boolean logic Y = A × B in positive logic.

Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device
SN74LVC1G08 ACTIVE 1-ch, 2-input 1.65-V to 5.5-V 32 mA drive strength AND gate Shorter average propagation delay (5.5ns), higher average drive strength (24mA)

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 21
Type Title Date
* Data sheet SN74AHC1G09 Single 2–Input Positive-AND Gate With Open-Drain Output datasheet (Rev. F) PDF | HTML 06 Feb 2024
Application brief Optimizing Optical Network Terminal Units With Logic PDF | HTML 05 Apr 2023
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 Sep 1999
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model

SN74AHC1G09 Behavioral SPICE Model

SCLM272.ZIP (6 KB) - PSpice Model
Reference designs

DLP4500-C350REF — High Resolution, Portable Light Steering Reference Design using DLP Technology

This reference design, featuring the DLP® 0.45” WXGA chipset and implemented in the DLP® LightCrafter™ 4500 evaluation module (EVM), enables flexible control of high resolution, accurate patterns for industrial, medical, and scientific applications. With a free USB-based GUI and (...)
Test report: PDF
Schematic: PDF
Reference designs

TIDA-00254 — Accurate Point Cloud Generation for 3D Machine Vision Applications using DLP® Technology

The 3D Machine Vision reference design employs Texas Instruments DLP® Advanced Light Control Software Development Kit (SDK) for LightCrafter™ series controllers, which allows developers to easily construct 3D point clouds by integrating TI’s digital micromirror device (DMD) (...)
Test report: PDF
Schematic: PDF
Package Pins Download
SOT-23 (DBV) 5 View options
SOT-SC70 (DCK) 5 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos