SN74AXCH4T245 4-bit dual-supply bus transceiver | TI.com

SN74AXCH4T245 (ACTIVE) 4-bit dual-supply bus transceiver

 

Description

The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.

The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OE and 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.

To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOE pins should be tied to VCCA through a pullup resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

Features

  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Bus-hold on data inputs eliminates the need for external pullup or pulldown resistors
  • Operating temperature from –40°C to +125°C
  • Multiple direction control pins to allow simultaneous up and down translation
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V Human-body model
    • 1000-V Charged-device model

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Parametrics

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Part number Order Technology Family Application Bits (#) High input voltage (Min) (Vih) High input voltage (Max) (Vih) Output voltage (Min) (V) Output voltage (Max) (V) IOH (Max) (mA) IOL (Max) (mA) Package Group Rating
SN74AXCH4T245 Order now AXC     UART
JTAG
SPI    
4     0.455     3.6     0.65     3.6     -12     12     TSSOP | 16
UQFN | 16    
Catalog    
SN74AVCH16T245 Order now AVC       16     1     3.6     1.2     3.6     -12     12     BGA MICROSTAR JUNIOR | 56
TSSOP | 48
TVSOP | 48    
Catalog    
SN74AVCH1T45 Order now AVC     GPIO     1     1     3.6     1.2     3.6     -12     12     DSBGA | 6
SC70 | 6
SOT-23 | 6    
Catalog    
SN74AVCH20T245 Order now AVC       20     0.8     3.6     1.2     3.6     -12     12     BGA MICROSTAR JUNIOR | 56
TSSOP | 56
TVSOP | 56    
Catalog    
SN74AVCH2T45 Order now AVC     GPIO
I2S    
2     0.8     3.6     1.2     3.6     -12     12     DSBGA | 8
SM8 | 8
VSSOP | 8    
Catalog    
SN74AVCH4T245 Order now AVC     UART
JTAG
SPI    
4     1.2     3.6     1.2     3.6     -12     12     SOIC | 16
TSSOP | 16
TVSOP | 16
UQFN | 16
VQFN | 16    
Catalog    
SN74AVCH8T245 Order now AVC       8     1.2     3.6     1.2