Product details

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PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Full-Carry Look-Ahead Across the Four Bits
  • Systems Achieve Partial Look-Ahead Performance With the Economy of Ripple Carry
  • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Full-Carry Look-Ahead Across the Four Bits
  • Systems Achieve Partial Look-Ahead Performance With the Economy of Ripple Carry
  • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

The ´F283 is a full adder that performs the addition of two 4-bit binary words. The sum ( ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit.

The device features full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.

The adder logic, including the carry, is implemented in its true form. End-around carry can be accomplished without the need for logic or level inversion.

The ´F283 can be used with either all-active-high (positive logic) or all-active-low (negative logic) operands.

The SN54F283 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F283 is characterized for operation from 0°C to 70°C.

The ´F283 is a full adder that performs the addition of two 4-bit binary words. The sum ( ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit.

The device features full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.

The adder logic, including the carry, is implemented in its true form. End-around carry can be accomplished without the need for logic or level inversion.

The ´F283 can be used with either all-active-high (positive logic) or all-active-low (negative logic) operands.

The SN54F283 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F283 is characterized for operation from 0°C to 70°C.

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Technical documentation

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Type Title Date
* Data sheet 4-Bit Binary Full Adders With Fast Carry datasheet (Rev. A) 01 Oct 1993
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Package Pins Download
PDIP (N) 16 View options
SOIC (D) 16 View options

Ordering & quality

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