SN74GTL2006 13-Bit GTL-/GTL/GTL+ To LVTTL Translator | TI.com

SN74GTL2006 (ACTIVE)

13-Bit GTL-/GTL/GTL+ To LVTTL Translator

13-Bit GTL-/GTL/GTL+ To LVTTL Translator - SN74GTL2006
Datasheet
 

Description

The SN74GTL2006 is a 13-bit translator to interface between the 3.3-V LVTTL chipset I/O and the Xeon™ processor GTL-/GTL/GTL+ I/O. The device is designed for platform health management in dual-processor applications.

Features

  • Operates as GTL-/GTL/GTL+ to LVTTL or LVTTL to GTL-/GTL/GTL+ Translator
  • Series Termination on TTL Outputs of 30
  • Latch-Up Testing to JEDEC Standard JESD 78 Exceeds 500 mA
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Parametrics Compare all products in Universal bus transceiver (UBT)

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Bits (#)
Voltage (Nom) (V)
F @ Nom Voltage (Max) (Mhz)
ICC @ Nom Voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
IOL (Max) (mA)
IOH (Max) (mA)
Schmitt Trigger
Rating
Operating Temperature Range (C)
Package Group
SN74GTL2003 SN74GTL2007 SN74GTL2010 SN74GTL2107
GTL     GTL     GTL     GTL    
1     3     1     3    
5.5     3.6     5.5     3.6    
8     12     10     12    
1
1.8
2.5
3.3
5    
3.3     5     3.3    
95     100     100     95    
0.001     12     3     12    
5.5
0.25    
10     0.25     10    
64     16     64     16    
-64     16     64     -16    
No     No     No     No    
Catalog     Catalog     Catalog     Catalog    
-40 to 85     -40 to 85     -40 to 85     -40 to 85    
TSSOP | 20
VQFN | 20    
TSSOP | 28     TSSOP | 24     TSSOP | 28