SCLS041I December 1982  – September 2015 SN54HC595 , SN74HC595

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6Timing Requirements
    7. 7.7Switching Characteristics
    8. 7.8Operating Characteristics
    9. 7.9Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1Overview
    2. 9.2Functional Block Diagram
    3. 9.3Feature Description
    4. 9.4Device Functional Modes
  10. 10Application and Implementation
    1. 10.1Application Information
    2. 10.2Typical Application
      1. 10.2.1Design Requirements
      2. 10.2.2Detailed Design Procedure
      3. 10.2.3Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1Layout Guidelines
    2. 12.2Layout Example
  13. 13Device and Documentation Support
    1. 13.1Documentation Support
      1. 13.1.1Related Documentation
    2. 13.2Related Links
    3. 13.3Community Resources
    4. 13.4Trademarks
    5. 13.5Electrostatic Discharge Caution
    6. 13.6Glossary
  14. 14Mechanical, Packaging, and Orderable Information

1 Features

  • 8-Bit Serial-In, Parallel-Out Shift
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Can Drive Up to 15 LSTTL Loads
  • Low Power Consumption: 80-μA (Maximum) ICC
  • tpd = 13 ns (Typical)
  • ±6-mA Output Drive at 5 V
  • Low Input Current: 1 μA (Maximum)
  • Shift Register Has Direct Clear
  • On Products Compliant to MIL-PRF-38535,
    All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

2 Applications

  • Network Switches
  • Power Infrastructure
  • LED Displays
  • Servers

3 Description

The SNx4HC595 devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
SN54HC595LCCC (20)8.89 mm x 8.89 mm
CDIP (16)21.34 mm x 6.92 mm
SN74HC595PDIP (16)19.31 mm × 6.35 mm
SOIC (16)9.90 mm x 3.90 mm
SOIC (16)10.30 mm x 7.50 mm
SSOP (16)6.20 mm x 5.30 mm
TSSOP (16)5.00 mm x 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)

SN54HC595 SN74HC595 logic_dgm_cls041.gif