SN74LVC1G175 Single D-Type Flip-Flop with Asynchronous Clear | TI.com

SN74LVC1G175 (ACTIVE)

Single D-Type Flip-Flop with Asynchronous Clear

 

Description

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G175 device has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

  • Available in the Texas Instruments
    NanoFree™ Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Max tpd of 4.3 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down
    Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Parametrics Compare all products in D-type flip-flop

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Bits (#)
Voltage (Nom) (V)
F @ nom voltage (Max) (Mhz)
ICC @ nom voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
IOL (Max) (mA)
IOH (Max) (mA)
3-state output
Rating
Operating temperature range (C)
SN74LVC1G175
LVC    
1.65    
5.5    
1    
1.8
2.5
3.3
5    
150    
0.01    
13.4
7.1
5.7
4    
32    
-32    
No    
Catalog    
-40 to 125
-40 to 85