SN74LVC2G86 Dual 2-Input Exclusive-Or Gate | TI.com

SN74LVC2G86 (ACTIVE) Dual 2-Input Exclusive-Or Gate

Dual 2-Input Exclusive-Or Gate - SN74LVC2G86
Datasheet
 

Description

This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.

Features

  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.7 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power-Down Mode and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Data rate (Max) (Mbps) Rating Operating temperature range (C) Package size: mm2:W x L (PKG) Package Group
SN74LVC2G86 Order now LVC     1.65     5.5     2     2     32     -32     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
100     Catalog     -40 to 125
-40 to 85    
8DSBGA: 3 mm2: 2.25 x 1.25 (DSBGA | 8)
8SM8: 12 mm2: 4 x 2.95 (SM8 | 8)
8VSSOP: 6 mm2: 3.1 x 2 (VSSOP | 8)    
DSBGA | 8
SM8 | 8
VSSOP | 8