This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.
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A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Inputs per channel||IOL (Max) (mA)||IOH (Max) (mA)||Input type||Output type||Features||Data rate (Max) (Mbps)||Rating||Operating temperature range (C)||Package size: mm2:W x L (PKG)||Package Group|
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)
-40 to 125
-40 to 85
8DSBGA: 3 mm2: 2.25 x 1.25 (DSBGA | 8)
8SM8: 12 mm2: 4 x 2.95 (SM8 | 8)
8VSSOP: 6 mm2: 3.1 x 2 (VSSOP | 8)
DSBGA | 8
SM8 | 8
VSSOP | 8