SLOS870B September 2016  – October 2017 TAS6424-Q1

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6Timing Requirements
    7. 7.7Typical Characteristics
  8. Parameter measurement Information
  9. Detailed description
    1. 9.1Overview
    2. 9.2Functional Block Diagram
    3. 9.3Feature Description
      1. 9.3.1 Serial Audio Port
        1. 9.3.1.1 I2S Mode
        2. 9.3.1.2Left-Justified Timing
        3. 9.3.1.3Right-Justified Timing
        4. 9.3.1.4TDM Mode
        5. 9.3.1.5Supported Clock Rates
        6. 9.3.1.6Audio-Clock Error Handling
      2. 9.3.2 High-Pass Filter
      3. 9.3.3 Volume Control and Gain
      4. 9.3.4 High-Frequency Pulse-Width Modulator (PWM)
      5. 9.3.5 Gate Drive
      6. 9.3.6 Power FETs
      7. 9.3.7 Load Diagnostics
        1. 9.3.7.1DC Load Diagnostics
        2. 9.3.7.2Line Output Diagnostics
        3. 9.3.7.3AC Load Diagnostics
      8. 9.3.8 Protection and Monitoring
        1. 9.3.8.1Overcurrent Limit (ILIMIT)
        2. 9.3.8.2Overcurrent Shutdown (ISD)
        3. 9.3.8.3DC Detect
        4. 9.3.8.4Clip Detect
        5. 9.3.8.5Global Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD)
        6. 9.3.8.6Channel Overtemperature Warning [OTW(i)] and Shutdown [OTSD(i)]
        7. 9.3.8.7Undervoltage (UV) and Power-On-Reset (POR)
        8. 9.3.8.8Overvoltage (OV) and Load Dump
      9. 9.3.9 Power Supply
        1. 9.3.9.1Vehicle-Battery Power-Supply Sequence
        2. 9.3.9.2Boosted Power-Supply Sequence
      10. 9.3.10Hardware Control Pins
        1. 9.3.10.1FAULT
        2. 9.3.10.2WARN
        3. 9.3.10.3MUTE
        4. 9.3.10.4STANDBY
    4. 9.4Device Functional Modes
      1. 9.4.1Operating Modes and Faults
    5. 9.5Programming
      1. 9.5.1I2C Serial Communication Bus
      2. 9.5.2I2C Bus Protocol
      3. 9.5.3Random Write
      4. 9.5.4Sequential Write
      5. 9.5.5Random Read
      6. 9.5.6Sequential Read
    6. 9.6Register Maps
      1. 9.6.1 Mode Control Register (address = 0x00) [default = 0x00]
      2. 9.6.2 Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
      3. 9.6.3 Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
      4. 9.6.4 SAP Control (Serial Audio-Port Control) Register (address = 0x03) [default = 0x04]
      5. 9.6.5 Channel State Control Register (address = 0x04) [default = 0x55]
      6. 9.6.6 Channel 1 Through 4 Volume Control Registers (address = 0x05-0x088) [default = 0xCF]
      7. 9.6.7 DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
      8. 9.6.8 DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
      9. 9.6.9 DC Load Diagnostic Control 3 Register (address = 0x0B) [default = 0x11]
      10. 9.6.10DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
      11. 9.6.11DC Load Diagnostic Report 2 Register (address = 0x0D) [default = 0x00]
      12. 9.6.12DC Load Diagnostics Report 3—Line Output—Register (address = 0x0E) [default = 0x00]
      13. 9.6.13Channel State Reporting Register (address = 0x0F) [default = 0x55]
      14. 9.6.14Channel Faults (Overcurrent, DC Detection) Register (address = 0x10) [default = 0x00]
      15. 9.6.15Global Faults 1 Register (address = 0x11) [default = 0x00]
      16. 9.6.16Global Faults 2 Register (address = 0x12) [default = 0x00]
      17. 9.6.17Warnings Register (address = 0x13) [default = 0x20]
      18. 9.6.18Pin Control Register (address = 0x14) [default = 0xFF]
      19. 9.6.19AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
      20. 9.6.20AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
      21. 9.6.21AC Load Diagnostic Impedance Report Ch1 through CH4 Registers (address = 0x17-0x1A) [default = 0x00]
      22. 9.6.22AC Load Diagnostic Phase Report High Register (address = 0x1B) [default = 0x00]
      23. 9.6.23AC Load Diagnostic Phase Report Low Register (address = 0x1C) [default = 0x00]
      24. 9.6.24AC Load Diagnostic STI Report High Register (address = 0x1D) [default = 0x00]
      25. 9.6.25AC Load Diagnostic STI Report Low Register (address = 0x1C) [default = 0x00]
      26. 9.6.26Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
      27. 9.6.27Clip Control Register (address = 0x22) [default = 0x01]
      28. 9.6.28Clip Window Register (address = 0x23) [default = 0x14]
      29. 9.6.29Clip Warning Register (address = 0x24) [default = 0x00]
      30. 9.6.30ILIMIT Status Register (address = 0x25) [default = 0x00]
      31. 9.6.31Miscellaneous Control 4 Register (address = 0x26) [default = 0x40]
  10. 10Application and Implementation
    1. 10.1Application Information
      1. 10.1.1AM-Radio Band Avoidance
      2. 10.1.2Parallel BTL Operation (PBTL)
      3. 10.1.3Demodulation Filter Design
      4. 10.1.4Line Driver Applications
    2. 10.2Typical Applications
      1. 10.2.1BTL Application
        1. 10.2.1.1Design Requirements
        2. 10.2.1.2Power Supplies
        3. 10.2.1.3Communication
        4. 10.2.1.4Detailed Design Procedure
          1. 10.2.1.4.1Hardware Design
          2. 10.2.1.4.2Digital Input and the Serial Audio Port
          3. 10.2.1.4.3Bootstrap Capacitors
          4. 10.2.1.4.4Output Reconstruction Filter
        5. 10.2.1.5Application Curves
      2. 10.2.2PBTL Application
        1. 10.2.2.1Design Requirements
          1. 10.2.2.1.1Detailed Design Procedure
        2. 10.2.2.2Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1Layout Guidelines
      1. 12.1.1Electrical Connection of Thermal pad and Heat Sink
      2. 12.1.2EMI Considerations
      3. 12.1.3General Guidelines
    2. 12.2Layout Example
    3. 12.3Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1Documentation Support
      1. 13.1.1Related Documentation
    2. 13.2Receiving Notification of Documentation Updates
    3. 13.3Community Resources
    4. 13.4Trademarks
    5. 13.5Electrostatic Discharge Caution
    6. 13.6Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • DKQ|56
Orderable Information

Features

  • Advanced Load Diagnostics
    • Runs without Input Clocks
    • AC Diagnostic for Tweeter Detection with Impedance and Phase Response
  • Easy to meet CISPR25-L5 EMC Specification
  • Qualified for Automotive Applications
  • Audio Inputs
    • 4 Channel I2S or 4/8-Channel TDM Input
    • Input Sample Rates: 44.1 kHz, 48 kHz, 96 kHz
    • Input Formats: 16-bit to 32-bit I2S, and TDM
  • Audio Outputs
    • Four-Channel Bridge-Tied Load (BTL), With Option of Parallel BTL (PBTL)
    • Up to 2.1-MHz Output Switching Frequency
    • 75 W, 10% THD Into 4 Ω at 25 V
    • 45 W, 10% THD Into 2 Ω at 14.4 V
    • 150 W, 10% THD Into 2 Ω at 25 V PBTL
  • Audio Performance Into 4 Ω at 14.4 V
    • THD+N < 0.03% at 1 W
    • 42-µVRMS Output Noise
    • –90-dB Crosstalk
  • Load Diagnostics
    • Output Open and Shorted Load
    • Output-to-Battery or Ground Shorts
    • Line Output Detection Up to 6 kΩ
    • Host-Independent Operation
    • Programmability for Flexible Production Line Testing
  • Protection
    • Output Current Limiting
    • Output Short Protection
    • 40-V Load Dump
    • Open Ground and Power Tolerant
    • DC Offset
    • Overtemperature
    • Undervoltage and Overvoltage
  • General Operation
    • 4.5-V to 26.4-V Supply voltage
    • I2C Control With 4 Address Options
    • Clip Detection and Thermal Warning

Applications

  • Automotive Head Units
  • Automotive External Amplifier Modules

Description

The TAS6424-Q1 device is a Four-channel digital-input Class-D audio amplifier that implements a 2.1 MHz PWM switching frequency that enables a cost-optimized solution in a very small PCB size, full operation down to 4.5 V for start/stop events, and exceptional sound quality with up to 40 kHz audio bandwidth

The TAS6424-Q1 Class-D audio amplifier is designed for use in automotive head units and external amplifier modules. The device provides four channels at 27 W into 4 Ω at 10% THD+N and 45 W into 2 Ω at 10% THD+N from a 14.4-V supply and 75 W into 4 Ω at 10% THD+N from a 25-V supply. The Class-D topology dramatically improves efficiency over traditional linear amplifier solutions. The output switching frequency can be set either above the AM band, which eliminates the AM-band interference and reduces output filter size and cost, or below AM band to optimize efficiency.

For a pin compatible two-channel amplifier, see the TAS6422-Q1

The device is offered in a 56-pin HSSOP PowerPAD™ package with the exposed thermal pad up.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
TAS6424-Q1HSSOP (56)18.41 mm × 7.49 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

PCB AREA

TAS6424-Q1 front_slos870.gif

Revision History

Changes from A Revision (October 2016) to B Revision

  • Changed the Features and Description sections for better Product Folder visibilityGo

Changes from * Revision (September 2016) to A Revision

  • Released the full version of the data sheet Go