THS1030 10-bit, 30-MSPS analog-to-digital converter (ADC) | TI.com

THS1030
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10-bit, 30-MSPS analog-to-digital converter (ADC)

 

Description

The THS1030 is a CMOS, low-power, 10-bit, 30MSPS analog-to-digital converter (ADC) that can operate with a supply range from 3 V to 5.5V. The THS1030 has been designed to give circuit developers flexibility. The analog input to the THS1030 can be either single-ended or differential. The THS1030 provides a wide selection of voltage references to match the user's design requirements. For more design flexibility, the internal reference can be bypassed to use an external reference to suit the dc accuracy and temperature drift requirements of the application. The out-of-range output is used to monitor any out-of-range condition in THS1030's input range.

The speed, resolution, and single-supply operation of the THS1030 are suited for applications in STB, video, multimedia, imaging, high-speed acquisition, and communications. The speed and resolution ideally suit charge-couple device (CCD) input systems such as color scanners, digital copiers, digital cameras, and camcorders. A wide input voltage range between REFBS and REFTS allows the THS1030 to be applied in both imaging and communications systems.

The THS1030C is characterized for operation from 0°C to 70°C, while the THS1030I is characterized for operation from –40°C to 85°C.

Features

  • 10-Bit Resolution, 30 MSPS Analog-to-Digital Converter
  • Configurable Input: Single-Ended or Differential
  • Differential Nonlinearity: ±0.3 LSB
  • Signal-to-Noise: 57 dB
  • Spurious Free Dynamic Range: 60 dB
  • Adjustable Internal Voltage Reference
  • Out-of-Range Indicator
  • Power-Down Mode
  • Pin Compatible With TLC876

Parametrics

Compare all products in High-speed ADCs (>10MSPS) Email Download to Excel
Part number Order Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
THS1030 Order now 30     Low Power     10     1     57     9     60.6     150     2     Parallel CMOS     -40 to 85
0 to 70    
150     No     TSSOP | 28     28TSSOP: 62 mm2: 6.4 x 9.7 (TSSOP | 28)     Catalog     Pipeline