THS1031 10-bit, 30-MSPS analog-to-digital converter (ADC) with 3-bit PGA |

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10-bit, 30-MSPS analog-to-digital converter (ADC) with 3-bit PGA



The THS1031 is a CMOS, low-power, 10-bit, 30 MSPS analog-to-digital converter (ADC) that can operate with a supply range from 3 V to 5.5 V. The THS1031 has been designed to give circuit developers flexibility. The analog input to the THS1031 can be either single-ended or differential. This device has a built-in clamp amplifier whose clamp input level can be driven from an external dc source or from an internal high-precision 10-bit digital clamp level programmable via an internal CLAMP register. A 3-bit PGA is included to maintain SNR for small signals. The THS1031 provides a wide selection of voltage references to match the user’s design requirements. For more design flexibility, the internal reference can be bypassed to use an external reference to suit the dc accuracy and temperature drift requirements of the application. The out-of-range output indicates any out-of-range condition in THS1031’s input signal. The format of digital output can be coded in either unsigned binary or 2s complement.

The speed, resolution, and single-supply operation of the THS1031 are suited to applications in set-top-box (STB), video, multimedia, imaging, high-speed acquisition, and communications. The built-in clamp function allows dc restoration of video signal and is suitable for video applications. The speed and resolution ideally suit charge-couple device (CCD) input systems such as color scanners, digital copiers, digital cameras, and camcorders. A wide input voltage range between REFBS and REFTS allows the THS1031 to be applied in both imaging and communications systems.

The THS1031C is characterized for operation from 0°C to 70°C, while the THS1031I is characterized for operation from –40°C to 85°C.


  • 10-Bit Resolution, 30 MSPS Analog-to-Digital Converter
  • Configurable Input Functions:
    • Single-Ended
    • Single-Ended With Analog Clamp
    • Single-Ended With Programmable Digital Clamp
    • Differential
  • Built-In Programmable Gain Amplifier (PGA)
  • Differential Nonlinearity: ±0.3 LSB
  • Signal-to-Noise: 56 dB
  • Spurious Free Dynamic Range: 60 dB
  • Adjustable Internal Voltage Reference
  • Straight Binary/2s Complement Output
  • Out-of-Range Indicator
  • Power-Down Mode


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Part number Order Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
THS1031 Order now 30     Low Power     10     1     56     9     60     160     2     Parallel CMOS     0 to 70     150     No     TSSOP | 28     28TSSOP: 62 mm2: 6.4 x 9.7 (TSSOP | 28)     Catalog     Pipeline