SBOS974D August   2019  – April 2021 THS6222

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 12 V
    6. 6.6 Electrical Characteristics: VS = 32 V
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics: VS = 12 V
    9. 6.9 Typical Characteristics: VS = 32 V
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Common-Mode Buffer
      2. 7.3.2 Thermal Protection and Package Power Dissipation
      3. 7.3.3 Output Voltage and Current Drive
      4. 7.3.4 Breakdown Supply Voltage
      5. 7.3.5 Surge Test Results
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Broadband PLC Line Driving
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 What to Do and What Not to Do
      1. 8.3.1 Do
      2. 8.3.2 Do Not
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Wafer and Die Information
    3. 10.3 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Supply range (VS): 8 V to 32 V
  • Integrated midsupply common-mode buffer
  • Large-signal bandwidth: 195 MHz (VO = 16 VPP)
  • Slew rate (16 V step): 5500 V/µs
  • Low distortion (VS = 12 V, 50 Ω load):
    • HD2: –80 dBc (1 MHz)
    • HD3: –90 dBc (1 MHz)
  • Output current: 338 mA (VS = 12 V, 25 Ω load)
  • Wide output swing (VS = 12 V):
    • 19.4 VPP (100 Ω load)
    • 18.6 VPP (50 Ω load)
  • Adjustable power modes:
    • Full-bias mode: 19.5 mA
    • Mid-bias mode: 15 mA
    • Low-bias mode: 10.4 mA
    • Low-power shutdown mode
    • IADJ pin for variable bias
  • Integrated overtemperature protection
  • Pin-compatible with the 24-pin THS6212 VQFN