TL072

(ACTIVE) Dual Low-Noise JFET-Input General-Purpose Operational Amplifier

Description

The TL07xx JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit.

The devices feature high slew rates, low-input bias and offset currents, and low offset-voltage temperature coefficient. The low harmonic distortion and low noise make the TL07xseries ideally suited for high-fidelity and audio pre-amplifier applications. Offset adjustment and external compensation options are available within the TL07x family.

Features

  • Low Power Consumption
  • Wide Common-Mode and Differential Voltage
    Ranges
  • Low Input Bias and Offset Currents
  • Output Short-Circuit Protection
  • Low Total Harmonic Distortion: 0.003% Typical
  • Low Noise
    Vn = 18 nV/√Hz Typ at f = 1 kHz
  • High-Input Impedance: JFET Input Stage
  • Internal Frequency Compensation
  • Latch-Up-Free Operation
  • High Slew Rate: 13 V/µs Typical
  • Common-Mode Input Voltage Range
    Includes VCC+

Parametrics

Number of Channels (#) 2   
Total Supply Voltage (Min) (+5V=5, +/-5V=10) 7   
Total Supply Voltage (Max) (+5V=5, +/-5V=10) 36   
GBW (Typ) (MHz) 3   
Slew Rate (Typ) (V/us) 13   
Rail-to-Rail In to V+   
Vos (Offset Voltage @ 25C) (Max) (mV) 6   
Iq per channel (Typ) (mA) 1.4   
Vn at 1kHz (Typ) (nV/rtHz) 18   
Rating Catalog   
Operating Temperature Range (C) -40 to 85^0 to 70   
Package Group PDIP^SO^SOIC^TSSOP   
Package Size: mm2:W x L (PKG) See datasheet (PDIP)   
Offset Drift (Typ) (uV/C) 18   
Additional Features N/A   
Input Bias Current (Max) (pA) 200   
CMRR (Typ) (dB) 100   
Output Current (Typ) (mA) 10   
Architecture FET   

Companion Products

Technical Documents

Datasheet (1)

Application notes (3)

Selection guides (1)

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